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| author | Craig Topper <craig.topper@intel.com> | 2018-08-11 06:42:50 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-08-11 06:42:50 +0000 |
| commit | c6cf16994097d5c8759968940589cdc1b6bbd591 (patch) | |
| tree | 99019b048218d6fd8fe0f5b44a904d5f9a832628 /llvm/lib/Target/X86/X86MacroFusion.cpp | |
| parent | 616eeb827d35e420e9ab8cd6e01cd6974065a1e2 (diff) | |
| download | bcm5719-llvm-c6cf16994097d5c8759968940589cdc1b6bbd591.tar.gz bcm5719-llvm-c6cf16994097d5c8759968940589cdc1b6bbd591.zip | |
[X86] Add the mem-reg form of CMP to the macro fusion shouldScheduleAdjacent.
Unlike the other arithmetic instructions the mem-reg form of compare is just a load and not a RMW operation. According to the Intel optimization manual, this form is also supported by macro fusion.
llvm-svn: 339498
Diffstat (limited to 'llvm/lib/Target/X86/X86MacroFusion.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86MacroFusion.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86MacroFusion.cpp b/llvm/lib/Target/X86/X86MacroFusion.cpp index 15e4b57394f..29db1c6cf6e 100644 --- a/llvm/lib/Target/X86/X86MacroFusion.cpp +++ b/llvm/lib/Target/X86/X86MacroFusion.cpp @@ -111,20 +111,24 @@ static bool shouldScheduleAdjacent(const TargetInstrInfo &TII, case X86::CMP16ri8: case X86::CMP16rm: case X86::CMP16rr: + case X86::CMP16mr: case X86::CMP32i32: case X86::CMP32ri: case X86::CMP32ri8: case X86::CMP32rm: case X86::CMP32rr: + case X86::CMP32mr: case X86::CMP64i32: case X86::CMP64ri32: case X86::CMP64ri8: case X86::CMP64rm: case X86::CMP64rr: + case X86::CMP64mr: case X86::CMP8i8: case X86::CMP8ri: case X86::CMP8rm: case X86::CMP8rr: + case X86::CMP8mr: case X86::ADD16i16: case X86::ADD16ri: case X86::ADD16ri8: |
