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author | Sanjoy Das <sanjoy@playingwithpointers.com> | 2015-07-20 20:31:39 +0000 |
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committer | Sanjoy Das <sanjoy@playingwithpointers.com> | 2015-07-20 20:31:39 +0000 |
commit | 93d608c3c3ecc7ce55a4b7f3281240a864f11b1c (patch) | |
tree | a87bc5305b85a635347de9354ba9d7b0cfa24c35 /llvm/lib/Target/X86/X86MCInstLower.cpp | |
parent | b29554dab927a92dda672cb597d3675f457a4ca2 (diff) | |
download | bcm5719-llvm-93d608c3c3ecc7ce55a4b7f3281240a864f11b1c.tar.gz bcm5719-llvm-93d608c3c3ecc7ce55a4b7f3281240a864f11b1c.zip |
[ImplicitNullChecks] Work with implicit defs.
Summary:
This change generalizes the implicit null checks pass to work with
instructions that don't have any explicit register defs. This lets us
use X86's `cmp` against memory as faulting load instructions.
Reviewers: reames, JosephTremoulet
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D11286
llvm-svn: 242703
Diffstat (limited to 'llvm/lib/Target/X86/X86MCInstLower.cpp')
-rw-r--r-- | llvm/lib/Target/X86/X86MCInstLower.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86MCInstLower.cpp b/llvm/lib/Target/X86/X86MCInstLower.cpp index 1b37457a87c..68977d38e15 100644 --- a/llvm/lib/Target/X86/X86MCInstLower.cpp +++ b/llvm/lib/Target/X86/X86MCInstLower.cpp @@ -875,7 +875,10 @@ void X86AsmPrinter::LowerFAULTING_LOAD_OP(const MachineInstr &MI, MCInst LoadMI; LoadMI.setOpcode(LoadOpcode); - LoadMI.addOperand(MCOperand::createReg(LoadDefRegister)); + + if (LoadDefRegister != X86::NoRegister) + LoadMI.addOperand(MCOperand::createReg(LoadDefRegister)); + for (auto I = MI.operands_begin() + LoadOperandsBeginIdx, E = MI.operands_end(); I != E; ++I) |