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| author | Craig Topper <craig.topper@intel.com> | 2019-03-05 18:37:33 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-03-05 18:37:33 +0000 |
| commit | 572e94ca023a292dde836b070763f010273444f9 (patch) | |
| tree | b9eac8768bb2d2a9253f2a70916faaaaa60db6b4 /llvm/lib/Target/X86/X86MCInstLower.cpp | |
| parent | bb322e79c16c5a372a1f257327e29feddcb2bc04 (diff) | |
| download | bcm5719-llvm-572e94ca023a292dde836b070763f010273444f9.tar.gz bcm5719-llvm-572e94ca023a292dde836b070763f010273444f9.zip | |
[X86] Enable 8-bit OR with disjoint bits to convert to LEA
We already support 8-bits adds in convertToThreeAddress. But we can also support 8-bit OR if the bits are disjoint. We already do this for 16/32/64.
Differential Revision: https://reviews.llvm.org/D58863
llvm-svn: 355423
Diffstat (limited to 'llvm/lib/Target/X86/X86MCInstLower.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86MCInstLower.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86MCInstLower.cpp b/llvm/lib/Target/X86/X86MCInstLower.cpp index cc2a1a43b67..ce6bdafbc27 100644 --- a/llvm/lib/Target/X86/X86MCInstLower.cpp +++ b/llvm/lib/Target/X86/X86MCInstLower.cpp @@ -586,9 +586,11 @@ ReSimplify: // These are pseudo-ops for OR to help with the OR->ADD transformation. We do // this with an ugly goto in case the resultant OR uses EAX and needs the // short form. + case X86::ADD8rr_DB: OutMI.setOpcode(X86::OR8rr); goto ReSimplify; case X86::ADD16rr_DB: OutMI.setOpcode(X86::OR16rr); goto ReSimplify; case X86::ADD32rr_DB: OutMI.setOpcode(X86::OR32rr); goto ReSimplify; case X86::ADD64rr_DB: OutMI.setOpcode(X86::OR64rr); goto ReSimplify; + case X86::ADD8ri_DB: OutMI.setOpcode(X86::OR8ri); goto ReSimplify; case X86::ADD16ri_DB: OutMI.setOpcode(X86::OR16ri); goto ReSimplify; case X86::ADD32ri_DB: OutMI.setOpcode(X86::OR32ri); goto ReSimplify; case X86::ADD64ri32_DB: OutMI.setOpcode(X86::OR64ri32); goto ReSimplify; |
