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| author | Amara Emerson <aemerson@apple.com> | 2018-12-10 18:44:58 +0000 |
|---|---|---|
| committer | Amara Emerson <aemerson@apple.com> | 2018-12-10 18:44:58 +0000 |
| commit | 5ec146046cbb1a69850d2712f40e9ea273e2a257 (patch) | |
| tree | 503a1200ca9f959d031a4bdf0077a8081bd2150d /llvm/lib/Target/X86/X86LegalizerInfo.cpp | |
| parent | c6e9380a56a6c7132b776412b81b1870b3d546ca (diff) | |
| download | bcm5719-llvm-5ec146046cbb1a69850d2712f40e9ea273e2a257.tar.gz bcm5719-llvm-5ec146046cbb1a69850d2712f40e9ea273e2a257.zip | |
[GlobalISel] Restrict G_MERGE_VALUES capability and replace with new opcodes.
This patch restricts the capability of G_MERGE_VALUES, and uses the new
G_BUILD_VECTOR and G_CONCAT_VECTORS opcodes instead in the appropriate places.
This patch also includes AArch64 support for selecting G_BUILD_VECTOR of <4 x s32>
and <2 x s64> vectors.
Differential Revisions: https://reviews.llvm.org/D53629
llvm-svn: 348788
Diffstat (limited to 'llvm/lib/Target/X86/X86LegalizerInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86LegalizerInfo.cpp | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/lib/Target/X86/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/X86LegalizerInfo.cpp index 4f59e0f79a7..4a49fa68dd0 100644 --- a/llvm/lib/Target/X86/X86LegalizerInfo.cpp +++ b/llvm/lib/Target/X86/X86LegalizerInfo.cpp @@ -271,7 +271,7 @@ void X86LegalizerInfo::setLegalizerInfoSSE1() { // Merge/Unmerge for (const auto &Ty : {v4s32, v2s64}) { - setAction({G_MERGE_VALUES, Ty}, Legal); + setAction({G_CONCAT_VECTORS, Ty}, Legal); setAction({G_UNMERGE_VALUES, 1, Ty}, Legal); } setAction({G_MERGE_VALUES, 1, s64}, Legal); @@ -316,11 +316,11 @@ void X86LegalizerInfo::setLegalizerInfoSSE2() { // Merge/Unmerge for (const auto &Ty : {v16s8, v32s8, v8s16, v16s16, v4s32, v8s32, v2s64, v4s64}) { - setAction({G_MERGE_VALUES, Ty}, Legal); + setAction({G_CONCAT_VECTORS, Ty}, Legal); setAction({G_UNMERGE_VALUES, 1, Ty}, Legal); } for (const auto &Ty : {v16s8, v8s16, v4s32, v2s64}) { - setAction({G_MERGE_VALUES, 1, Ty}, Legal); + setAction({G_CONCAT_VECTORS, 1, Ty}, Legal); setAction({G_UNMERGE_VALUES, Ty}, Legal); } } @@ -367,12 +367,12 @@ void X86LegalizerInfo::setLegalizerInfoAVX() { // Merge/Unmerge for (const auto &Ty : {v32s8, v64s8, v16s16, v32s16, v8s32, v16s32, v4s64, v8s64}) { - setAction({G_MERGE_VALUES, Ty}, Legal); + setAction({G_CONCAT_VECTORS, Ty}, Legal); setAction({G_UNMERGE_VALUES, 1, Ty}, Legal); } for (const auto &Ty : {v16s8, v32s8, v8s16, v16s16, v4s32, v8s32, v2s64, v4s64}) { - setAction({G_MERGE_VALUES, 1, Ty}, Legal); + setAction({G_CONCAT_VECTORS, 1, Ty}, Legal); setAction({G_UNMERGE_VALUES, Ty}, Legal); } } @@ -400,11 +400,11 @@ void X86LegalizerInfo::setLegalizerInfoAVX2() { // Merge/Unmerge for (const auto &Ty : {v64s8, v32s16, v16s32, v8s64}) { - setAction({G_MERGE_VALUES, Ty}, Legal); + setAction({G_CONCAT_VECTORS, Ty}, Legal); setAction({G_UNMERGE_VALUES, 1, Ty}, Legal); } for (const auto &Ty : {v32s8, v16s16, v8s32, v4s64}) { - setAction({G_MERGE_VALUES, 1, Ty}, Legal); + setAction({G_CONCAT_VECTORS, 1, Ty}, Legal); setAction({G_UNMERGE_VALUES, Ty}, Legal); } } |
