summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/X86/X86IntrinsicsInfo.h
diff options
context:
space:
mode:
authorCraig Topper <craig.topper@intel.com>2017-11-12 18:51:09 +0000
committerCraig Topper <craig.topper@intel.com>2017-11-12 18:51:09 +0000
commitb42a23ff8f6d200c744b3f04de50f2c1bc4e6adf (patch)
treecaff19652fc97ba18fc1a3c9e8417efb5f0898ca /llvm/lib/Target/X86/X86IntrinsicsInfo.h
parent6b53c4a982b5c1c609cc877a804c08a94a1cea0f (diff)
downloadbcm5719-llvm-b42a23ff8f6d200c744b3f04de50f2c1bc4e6adf.tar.gz
bcm5719-llvm-b42a23ff8f6d200c744b3f04de50f2c1bc4e6adf.zip
[X86] Add an X86ISD::RANGES opcode to use for the scalar intrinsics.
This fixes a bug where we selected packed instructions for scalar intrinsics. llvm-svn: 317999
Diffstat (limited to 'llvm/lib/Target/X86/X86IntrinsicsInfo.h')
-rw-r--r--llvm/lib/Target/X86/X86IntrinsicsInfo.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86IntrinsicsInfo.h b/llvm/lib/Target/X86/X86IntrinsicsInfo.h
index 9b341dcdecd..13411abacbe 100644
--- a/llvm/lib/Target/X86/X86IntrinsicsInfo.h
+++ b/llvm/lib/Target/X86/X86IntrinsicsInfo.h
@@ -999,8 +999,8 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86_INTRINSIC_DATA(avx512_mask_range_ps_128, INTR_TYPE_3OP_MASK_RM, X86ISD::VRANGE, 0),
X86_INTRINSIC_DATA(avx512_mask_range_ps_256, INTR_TYPE_3OP_MASK_RM, X86ISD::VRANGE, 0),
X86_INTRINSIC_DATA(avx512_mask_range_ps_512, INTR_TYPE_3OP_MASK_RM, X86ISD::VRANGE, 0),
- X86_INTRINSIC_DATA(avx512_mask_range_sd, INTR_TYPE_SCALAR_MASK_RM, X86ISD::VRANGE, 0),
- X86_INTRINSIC_DATA(avx512_mask_range_ss, INTR_TYPE_SCALAR_MASK_RM, X86ISD::VRANGE, 0),
+ X86_INTRINSIC_DATA(avx512_mask_range_sd, INTR_TYPE_SCALAR_MASK_RM, X86ISD::VRANGES, 0),
+ X86_INTRINSIC_DATA(avx512_mask_range_ss, INTR_TYPE_SCALAR_MASK_RM, X86ISD::VRANGES, 0),
X86_INTRINSIC_DATA(avx512_mask_reduce_pd_128, INTR_TYPE_2OP_MASK_RM, X86ISD::VREDUCE, 0),
X86_INTRINSIC_DATA(avx512_mask_reduce_pd_256, INTR_TYPE_2OP_MASK_RM, X86ISD::VREDUCE, 0),
X86_INTRINSIC_DATA(avx512_mask_reduce_pd_512, INTR_TYPE_2OP_MASK_RM, X86ISD::VREDUCE, 0),
OpenPOWER on IntegriCloud