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| author | Benjamin Kramer <benny.kra@googlemail.com> | 2017-08-20 13:03:48 +0000 |
|---|---|---|
| committer | Benjamin Kramer <benny.kra@googlemail.com> | 2017-08-20 13:03:48 +0000 |
| commit | 49a49fe816122f9bc4cf8f909e0bc24aa84ea4ce (patch) | |
| tree | f67fcbe4d22d0268902ea501339f083eab383c62 /llvm/lib/Target/X86/X86InstructionSelector.cpp | |
| parent | df8c2628ac6778024d6b99484bb94fd77e466d0e (diff) | |
| download | bcm5719-llvm-49a49fe816122f9bc4cf8f909e0bc24aa84ea4ce.tar.gz bcm5719-llvm-49a49fe816122f9bc4cf8f909e0bc24aa84ea4ce.zip | |
Move helper classes into anonymous namespaces.
No functionality change intended.
llvm-svn: 311288
Diffstat (limited to 'llvm/lib/Target/X86/X86InstructionSelector.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstructionSelector.cpp | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86InstructionSelector.cpp b/llvm/lib/Target/X86/X86InstructionSelector.cpp index 028039d0b0c..e2f38c51198 100644 --- a/llvm/lib/Target/X86/X86InstructionSelector.cpp +++ b/llvm/lib/Target/X86/X86InstructionSelector.cpp @@ -167,7 +167,7 @@ X86InstructionSelector::getRegClass(LLT Ty, unsigned Reg, return getRegClass(Ty, RegBank); } -unsigned getSubRegIndex(const TargetRegisterClass *RC) { +static unsigned getSubRegIndex(const TargetRegisterClass *RC) { unsigned SubIdx = X86::NoSubRegister; if (RC == &X86::GR32RegClass) { SubIdx = X86::sub_32bit; @@ -180,7 +180,7 @@ unsigned getSubRegIndex(const TargetRegisterClass *RC) { return SubIdx; } -const TargetRegisterClass *getRegClassFromGRPhysReg(unsigned Reg) { +static const TargetRegisterClass *getRegClassFromGRPhysReg(unsigned Reg) { assert(TargetRegisterInfo::isPhysicalRegister(Reg)); if (X86::GR64RegClass.contains(Reg)) return &X86::GR64RegClass; @@ -403,8 +403,9 @@ unsigned X86InstructionSelector::getLoadStoreOp(LLT &Ty, const RegisterBank &RB, } // Fill in an address from the given instruction. -void X86SelectAddress(const MachineInstr &I, const MachineRegisterInfo &MRI, - X86AddressMode &AM) { +static void X86SelectAddress(const MachineInstr &I, + const MachineRegisterInfo &MRI, + X86AddressMode &AM) { assert(I.getOperand(0).isReg() && "unsupported opperand."); assert(MRI.getType(I.getOperand(0).getReg()).isPointer() && |
