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| author | Craig Topper <craig.topper@gmail.com> | 2015-01-07 08:10:36 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2015-01-07 08:10:36 +0000 |
| commit | 8b3c47ca5771deacb0fef5f69bfa9036f0bcb7aa (patch) | |
| tree | a1e2647360630b27dcf3a855447a469184aa0cfd /llvm/lib/Target/X86/X86InstrShiftRotate.td | |
| parent | 23fa478709dd690e72e0d7baa6ce886094331009 (diff) | |
| download | bcm5719-llvm-8b3c47ca5771deacb0fef5f69bfa9036f0bcb7aa.tar.gz bcm5719-llvm-8b3c47ca5771deacb0fef5f69bfa9036f0bcb7aa.zip | |
[X86] Don't mark the shift by 1 instructions as isConvertibleToThreeAddress. There is no handling for them.
llvm-svn: 225344
Diffstat (limited to 'llvm/lib/Target/X86/X86InstrShiftRotate.td')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrShiftRotate.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86InstrShiftRotate.td b/llvm/lib/Target/X86/X86InstrShiftRotate.td index 3f1646907b6..c706d43c9f5 100644 --- a/llvm/lib/Target/X86/X86InstrShiftRotate.td +++ b/llvm/lib/Target/X86/X86InstrShiftRotate.td @@ -49,6 +49,7 @@ def SHL64ri : RIi8<0xC1, MRM4r, (outs GR64:$dst), "shl{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (shl GR64:$src1, (i8 imm:$src2)))], IIC_SR>; +} // isConvertibleToThreeAddress = 1 // NOTE: We don't include patterns for shifts of a register by one, because // 'add reg,reg' is cheaper (and we have a Pat pattern for shift-by-one). @@ -62,7 +63,6 @@ def SHL32r1 : I<0xD1, MRM4r, (outs GR32:$dst), (ins GR32:$src1), def SHL64r1 : RI<0xD1, MRM4r, (outs GR64:$dst), (ins GR64:$src1), "shl{q}\t$dst", [], IIC_SR>; } // hasSideEffects = 0 -} // isConvertibleToThreeAddress = 1 } // Constraints = "$src = $dst", SchedRW |
