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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-03-27 20:38:54 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-03-27 20:38:54 +0000 |
| commit | a2f26788a3a8192312a066f4782cad6c607fbdab (patch) | |
| tree | 77be767a985ddd47755eaf0036e457f064973b49 /llvm/lib/Target/X86/X86InstrSSE.td | |
| parent | d4507266c8c8f1bd99f7d3fcb86989cda2e16066 (diff) | |
| download | bcm5719-llvm-a2f26788a3a8192312a066f4782cad6c607fbdab.tar.gz bcm5719-llvm-a2f26788a3a8192312a066f4782cad6c607fbdab.zip | |
[X86] Add WriteFMOVMSK/WriteVecMOVMSK/WriteMMXMOVMSK scheduler classes
Currently MOVMSK instructions use the WriteVecLogic class, which is a very poor choice given that MOVMSK involves a SSE->GPR transfer.
Differential Revision: https://reviews.llvm.org/D44924
llvm-svn: 328664
Diffstat (limited to 'llvm/lib/Target/X86/X86InstrSSE.td')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index 5ad23994152..127509beab1 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -2593,7 +2593,7 @@ multiclass sse12_extr_sign_mask<RegisterClass RC, ValueType vt, def rr : PI<0x50, MRMSrcReg, (outs GR32orGR64:$dst), (ins RC:$src), !strconcat(asm, "\t{$src, $dst|$dst, $src}"), [(set GR32orGR64:$dst, (X86movmsk (vt RC:$src)))], IIC_SSE_MOVMSK, d>, - Sched<[WriteVecLogic]>; + Sched<[WriteFMOVMSK]>; } let Predicates = [HasAVX] in { @@ -4271,7 +4271,7 @@ defm PINSRW : sse2_pinsrw, PD; // SSE2 - Packed Mask Creation //===---------------------------------------------------------------------===// -let ExeDomain = SSEPackedInt, SchedRW = [WriteVecLogic] in { +let ExeDomain = SSEPackedInt, SchedRW = [WriteVecMOVMSK] in { def VPMOVMSKBrr : VPDI<0xD7, MRMSrcReg, (outs GR32orGR64:$dst), (ins VR128:$src), @@ -4283,8 +4283,8 @@ let Predicates = [HasAVX2] in { def VPMOVMSKBYrr : VPDI<0xD7, MRMSrcReg, (outs GR32orGR64:$dst), (ins VR256:$src), "pmovmskb\t{$src, $dst|$dst, $src}", - [(set GR32orGR64:$dst, (X86movmsk (v32i8 VR256:$src)))]>, - VEX, VEX_L, VEX_WIG; + [(set GR32orGR64:$dst, (X86movmsk (v32i8 VR256:$src)))], + IIC_SSE_MOVMSK>, VEX, VEX_L, VEX_WIG; } def PMOVMSKBrr : PDI<0xD7, MRMSrcReg, (outs GR32orGR64:$dst), (ins VR128:$src), |
