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| author | Bill Wendling <isanbard@gmail.com> | 2009-05-28 23:40:46 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2009-05-28 23:40:46 +0000 |
| commit | 2e09bd3d34a24454d774e5f3ee6865de0914205a (patch) | |
| tree | 02fc695847ecb19cac977e644f8bc8b0e823ac15 /llvm/lib/Target/X86/X86InstrSSE.td | |
| parent | d6ab8744dc68e7dec176a5899e1d68a4a8de91f0 (diff) | |
| download | bcm5719-llvm-2e09bd3d34a24454d774e5f3ee6865de0914205a.tar.gz bcm5719-llvm-2e09bd3d34a24454d774e5f3ee6865de0914205a.zip | |
The MONITOR and MWAIT instructions have insufficient information for
decoding. Essentially, they both map to the same column in the "opcode
extensions for one- and two-byte opcodes" table in the x86 manual. The RawFrm
complicates decoding this.
Instead, use opcode 0x01, prefix 0x01, and form MRM1r. Then have the code
emitter special case these, a la [SML]FENCE.
llvm-svn: 72556
Diffstat (limited to 'llvm/lib/Target/X86/X86InstrSSE.td')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index 83eae18cc92..1fafa46fa2d 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -2504,9 +2504,9 @@ let Constraints = "$src1 = $dst" in { } // Thread synchronization -def MONITOR : I<0xC8, RawFrm, (outs), (ins), "monitor", +def MONITOR : I<0x01, MRM1r, (outs), (ins), "monitor", [(int_x86_sse3_monitor EAX, ECX, EDX)]>,TB, Requires<[HasSSE3]>; -def MWAIT : I<0xC9, RawFrm, (outs), (ins), "mwait", +def MWAIT : I<0x01, MRM1r, (outs), (ins), "mwait", [(int_x86_sse3_mwait ECX, EAX)]>, TB, Requires<[HasSSE3]>; // vector_shuffle v1, <undef> <1, 1, 3, 3> |
