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| author | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2016-01-24 10:41:28 +0000 |
|---|---|---|
| committer | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2016-01-24 10:41:28 +0000 |
| commit | 29cde35b43a8ff413ecec55abfa64ab43f99b3f1 (patch) | |
| tree | d0872276b5a0e86de8d6f5ff05d44547fcf7c6b9 /llvm/lib/Target/X86/X86InstrInfo.td | |
| parent | c077841492e574bada9cea399b3f5b2ea1f86da1 (diff) | |
| download | bcm5719-llvm-29cde35b43a8ff413ecec55abfa64ab43f99b3f1.tar.gz bcm5719-llvm-29cde35b43a8ff413ecec55abfa64ab43f99b3f1.zip | |
Added Skylake client to X86 targets and features
Changes in X86.td:
I set features of Intel processors in incremental form: IVB = SNB + X HSW = IVB + X ..
I added Skylake client processor and defined it's features
FeatureADX was missing on KNL
Added some new features to appropriate processors SMAP, IFMA, PREFETCHWT1, VMFUNC and others
Differential Revision: http://reviews.llvm.org/D16357
llvm-svn: 258659
Diffstat (limited to 'llvm/lib/Target/X86/X86InstrInfo.td')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.td | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index 2c0be6f6ca1..e2624e5d9a3 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -797,6 +797,8 @@ def HasBMI : Predicate<"Subtarget->hasBMI()">; def HasBMI2 : Predicate<"Subtarget->hasBMI2()">; def HasVBMI : Predicate<"Subtarget->hasVBMI()">, AssemblerPredicate<"FeatureVBMI", "AVX-512 VBMI ISA">; +def HasIFMA : Predicate<"Subtarget->hasIFMA()">, + AssemblerPredicate<"FeatureIFMA", "AVX-512 IFMA ISA">; def HasRTM : Predicate<"Subtarget->hasRTM()">; def HasHLE : Predicate<"Subtarget->hasHLE()">; def HasTSX : Predicate<"Subtarget->hasRTM() || Subtarget->hasHLE()">; |
