diff options
| author | Craig Topper <craig.topper@intel.com> | 2018-01-08 06:53:54 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-01-08 06:53:54 +0000 |
| commit | f090e8a89a9b58e462422ba730310bccfd052ee4 (patch) | |
| tree | da18c332740a6aa4c54d4132db4b22cb305bb293 /llvm/lib/Target/X86/X86InstrFragmentsSIMD.td | |
| parent | a2018e799a716aaaef9ced091e79994255e0b161 (diff) | |
| download | bcm5719-llvm-f090e8a89a9b58e462422ba730310bccfd052ee4.tar.gz bcm5719-llvm-f090e8a89a9b58e462422ba730310bccfd052ee4.zip | |
[X86] Replace CVT2MASK ISD opcode with PCMPGTM compared to zero.
CVT2MASK is just checking the sign bit which can be represented with a comparison with zero.
llvm-svn: 321985
Diffstat (limited to 'llvm/lib/Target/X86/X86InstrFragmentsSIMD.td')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrFragmentsSIMD.td | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td index ebbef00c01d..63a62ed636a 100644 --- a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td +++ b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td @@ -671,8 +671,6 @@ def X86vfproundRnd: SDNode<"X86ISD::VFPROUND_RND", SDTCisOpSmallerThanOp<0, 1>, SDTCisVT<2, i32>]>>; -def X86cvt2mask : SDNode<"X86ISD::CVT2MASK", SDTIntTruncOp>; - // galois field arithmetic def X86GF2P8affineinvqb : SDNode<"X86ISD::GF2P8AFFINEINVQB", SDTBlend>; def X86GF2P8affineqb : SDNode<"X86ISD::GF2P8AFFINEQB", SDTBlend>; |
