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authorAaron Ballman <aaron@aaronballman.com>2015-11-11 13:44:06 +0000
committerAaron Ballman <aaron@aaronballman.com>2015-11-11 13:44:06 +0000
commit107bb0d193d842cefc4e8219dfc9bd8d911fd235 (patch)
treef24a2fa038171abf7493b281af0e526807f87eb5 /llvm/lib/Target/X86/X86FrameLowering.cpp
parenta9a728513cc485385630a03c0c1b1cbd579a4ef7 (diff)
downloadbcm5719-llvm-107bb0d193d842cefc4e8219dfc9bd8d911fd235.tar.gz
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Silencing nine warnings for "enumeral and non-enumeral type in conditional expression"; NFC.
llvm-svn: 252728
Diffstat (limited to 'llvm/lib/Target/X86/X86FrameLowering.cpp')
-rw-r--r--llvm/lib/Target/X86/X86FrameLowering.cpp28
1 files changed, 18 insertions, 10 deletions
diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp
index 21b912603be..7d257ee6afa 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.cpp
+++ b/llvm/lib/Target/X86/X86FrameLowering.cpp
@@ -531,16 +531,24 @@ MachineInstr *X86FrameLowering::emitStackProbeInline(
// registers. For the prolog expansion we use RAX, RCX and RDX.
MachineRegisterInfo &MRI = MF.getRegInfo();
const TargetRegisterClass *RegClass = &X86::GR64RegClass;
- const unsigned
- SizeReg = InProlog ? X86::RAX : MRI.createVirtualRegister(RegClass),
- ZeroReg = InProlog ? X86::RCX : MRI.createVirtualRegister(RegClass),
- CopyReg = InProlog ? X86::RDX : MRI.createVirtualRegister(RegClass),
- TestReg = InProlog ? X86::RDX : MRI.createVirtualRegister(RegClass),
- FinalReg = InProlog ? X86::RDX : MRI.createVirtualRegister(RegClass),
- RoundedReg = InProlog ? X86::RDX : MRI.createVirtualRegister(RegClass),
- LimitReg = InProlog ? X86::RCX : MRI.createVirtualRegister(RegClass),
- JoinReg = InProlog ? X86::RCX : MRI.createVirtualRegister(RegClass),
- ProbeReg = InProlog ? X86::RCX : MRI.createVirtualRegister(RegClass);
+ const unsigned SizeReg = InProlog ? (unsigned)X86::RAX
+ : MRI.createVirtualRegister(RegClass),
+ ZeroReg = InProlog ? (unsigned)X86::RCX
+ : MRI.createVirtualRegister(RegClass),
+ CopyReg = InProlog ? (unsigned)X86::RDX
+ : MRI.createVirtualRegister(RegClass),
+ TestReg = InProlog ? (unsigned)X86::RDX
+ : MRI.createVirtualRegister(RegClass),
+ FinalReg = InProlog ? (unsigned)X86::RDX
+ : MRI.createVirtualRegister(RegClass),
+ RoundedReg = InProlog ? (unsigned)X86::RDX
+ : MRI.createVirtualRegister(RegClass),
+ LimitReg = InProlog ? (unsigned)X86::RCX
+ : MRI.createVirtualRegister(RegClass),
+ JoinReg = InProlog ? (unsigned)X86::RCX
+ : MRI.createVirtualRegister(RegClass),
+ ProbeReg = InProlog ? (unsigned)X86::RCX
+ : MRI.createVirtualRegister(RegClass);
// SP-relative offsets where we can save RCX and RDX.
int64_t RCXShadowSlot = 0;
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