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| author | Simon Atanasyan <simon@atanasyan.com> | 2019-09-09 17:28:45 +0000 |
|---|---|---|
| committer | Simon Atanasyan <simon@atanasyan.com> | 2019-09-09 17:28:45 +0000 |
| commit | 56e4ea2bff9eb2f43b20a68951e6263ad3c9022f (patch) | |
| tree | ec3c3ee002fa9d837cff383978526c9a18f643f2 /llvm/lib/Target/X86/X86FastISel.cpp | |
| parent | d2a9516a6d08c3edd7c5484f4d10f4b38b48c9d6 (diff) | |
| download | bcm5719-llvm-56e4ea2bff9eb2f43b20a68951e6263ad3c9022f.tar.gz bcm5719-llvm-56e4ea2bff9eb2f43b20a68951e6263ad3c9022f.zip | |
[mips] Fix decoding of microMIPS JALX instruction
microMIPS jump and link exchange instruction stores a target in a
26-bits field. Despite other microMIPS JAL instructions these bits
are target address shifted right 2 bits [1]. The patch fixes the
JALX instruction decoding and uses 2-bit shift.
[1] MIPS Architecture for Programmers Volume II-B: The microMIPS32 Instruction Set
Differential Revision: https://reviews.llvm.org/D67320
llvm-svn: 371428
Diffstat (limited to 'llvm/lib/Target/X86/X86FastISel.cpp')
0 files changed, 0 insertions, 0 deletions
