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| author | Craig Topper <craig.topper@intel.com> | 2019-05-11 04:19:33 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-05-11 04:19:33 +0000 |
| commit | 31f7adb94f6a46862fc3cadb75967121b31083ed (patch) | |
| tree | 3e993a31c04f627b4ed03823147ea6c571a89cc3 /llvm/lib/Target/X86/X86FastISel.cpp | |
| parent | bdef12df8d6f0cf7ddb0a626cef377cbcd6d8e30 (diff) | |
| download | bcm5719-llvm-31f7adb94f6a46862fc3cadb75967121b31083ed.tar.gz bcm5719-llvm-31f7adb94f6a46862fc3cadb75967121b31083ed.zip | |
[X86] Don't emit MOVNTDQA loads from fast-isel without SSE4.1.
We were checking for SSE4.1 for FP types, but not integer 128-bit types.
Fixes PR41837.
llvm-svn: 360512
Diffstat (limited to 'llvm/lib/Target/X86/X86FastISel.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86FastISel.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp index 6fca1acb009..74464f28c02 100644 --- a/llvm/lib/Target/X86/X86FastISel.cpp +++ b/llvm/lib/Target/X86/X86FastISel.cpp @@ -396,7 +396,7 @@ bool X86FastISel::X86FastEmitLoad(EVT VT, X86AddressMode &AM, case MVT::v2i64: case MVT::v8i16: case MVT::v16i8: - if (IsNonTemporal && Alignment >= 16) + if (IsNonTemporal && Alignment >= 16 && HasSSE41) Opc = HasVLX ? X86::VMOVNTDQAZ128rm : HasAVX ? X86::VMOVNTDQArm : X86::MOVNTDQArm; else if (Alignment >= 16) |
