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author | Craig Topper <craig.topper@intel.com> | 2019-04-05 19:28:09 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2019-04-05 19:28:09 +0000 |
commit | 80aa2290fb02386579e5d7b0a1d8ce3691fd88da (patch) | |
tree | 1978efce308a80e3eb9b48155418940531556fb2 /llvm/lib/Target/X86/X86CondBrFolding.cpp | |
parent | 7323c2bf850b61b85252e17e6f1f73037c328378 (diff) | |
download | bcm5719-llvm-80aa2290fb02386579e5d7b0a1d8ce3691fd88da.tar.gz bcm5719-llvm-80aa2290fb02386579e5d7b0a1d8ce3691fd88da.zip |
[X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand.
Summary:
This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between Jcc instructions and condition codes.
Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser.
Reviewers: spatel, lebedev.ri, courbet, gchatelet, RKSimon
Reviewed By: RKSimon
Subscribers: MatzeB, qcolombet, eraman, hiraditya, arphaman, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60228
llvm-svn: 357802
Diffstat (limited to 'llvm/lib/Target/X86/X86CondBrFolding.cpp')
-rw-r--r-- | llvm/lib/Target/X86/X86CondBrFolding.cpp | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/llvm/lib/Target/X86/X86CondBrFolding.cpp b/llvm/lib/Target/X86/X86CondBrFolding.cpp index c14b3a0884e..932b3af85ce 100644 --- a/llvm/lib/Target/X86/X86CondBrFolding.cpp +++ b/llvm/lib/Target/X86/X86CondBrFolding.cpp @@ -225,10 +225,9 @@ void X86CondBrFolding::replaceBrDest(MachineBasicBlock *MBB, MachineInstr *BrMI; if (MBBInfo->TBB == OrigDest) { BrMI = MBBInfo->BrInstr; - unsigned JNCC = GetCondBranchFromCond(MBBInfo->BranchCode); MachineInstrBuilder MIB = - BuildMI(*MBB, BrMI, MBB->findDebugLoc(BrMI), TII->get(JNCC)) - .addMBB(NewDest); + BuildMI(*MBB, BrMI, MBB->findDebugLoc(BrMI), TII->get(X86::JCC_1)) + .addMBB(NewDest).addImm(MBBInfo->BranchCode); MBBInfo->TBB = NewDest; MBBInfo->BrInstr = MIB.getInstr(); } else { // Should be the unconditional jump stmt. @@ -254,8 +253,8 @@ void X86CondBrFolding::fixupModifiedCond(MachineBasicBlock *MBB) { MachineInstr *BrMI = MBBInfo->BrInstr; X86::CondCode CC = MBBInfo->BranchCode; MachineInstrBuilder MIB = BuildMI(*MBB, BrMI, MBB->findDebugLoc(BrMI), - TII->get(GetCondBranchFromCond(CC))) - .addMBB(MBBInfo->TBB); + TII->get(X86::JCC_1)) + .addMBB(MBBInfo->TBB).addImm(CC); BrMI->eraseFromParent(); MBBInfo->BrInstr = MIB.getInstr(); @@ -323,8 +322,8 @@ void X86CondBrFolding::optimizeCondBr( llvm_unreachable("unexpected condtional code."); } BuildMI(*RootMBB, UncondBrI, RootMBB->findDebugLoc(UncondBrI), - TII->get(GetCondBranchFromCond(NewCC))) - .addMBB(RootMBBInfo->FBB); + TII->get(X86::JCC_1)) + .addMBB(RootMBBInfo->FBB).addImm(NewCC); // RootMBB: Jump to TargetMBB BuildMI(*RootMBB, UncondBrI, RootMBB->findDebugLoc(UncondBrI), @@ -512,7 +511,7 @@ X86CondBrFolding::analyzeMBB(MachineBasicBlock &MBB) { if (I->isBranch()) { if (TBB) return nullptr; - CC = X86::getCondFromBranchOpc(I->getOpcode()); + CC = X86::getCondFromBranch(*I); switch (CC) { default: return nullptr; |