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| author | Craig Topper <craig.topper@gmail.com> | 2014-01-14 07:41:20 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2014-01-14 07:41:20 +0000 |
| commit | ae11aed9d7b380ad3af49eefe7e0c0161dd294a6 (patch) | |
| tree | 8f232e02b13bb7cb789139f58861e26481d5838e /llvm/lib/Target/X86/X86CodeEmitter.cpp | |
| parent | 47d5569de1047c96ad79f0fd48e79c864d7cf700 (diff) | |
| download | bcm5719-llvm-ae11aed9d7b380ad3af49eefe7e0c0161dd294a6.tar.gz bcm5719-llvm-ae11aed9d7b380ad3af49eefe7e0c0161dd294a6.zip | |
Separate the concept of 16-bit/32-bit operand size controlled by 0x66 prefix and the current mode from the concept of SSE instructions using 0x66 prefix as part of their encoding without being affected by the mode.
This should allow SSE instructions to be encoded correctly in 16-bit mode which r198586 probably broke.
llvm-svn: 199193
Diffstat (limited to 'llvm/lib/Target/X86/X86CodeEmitter.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86CodeEmitter.cpp | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86CodeEmitter.cpp b/llvm/lib/Target/X86/X86CodeEmitter.cpp index 072996679bc..5dba4ecbfdb 100644 --- a/llvm/lib/Target/X86/X86CodeEmitter.cpp +++ b/llvm/lib/Target/X86/X86CodeEmitter.cpp @@ -696,6 +696,12 @@ void Emitter<CodeEmitter>::emitOpcodePrefix(uint64_t TSFlags, Need0FPrefix = true; break; case X86II::REP: break; // already handled. + case X86II::PD: // 66 0F + case X86II::T8PD: // 66 0F 38 + case X86II::TAPD: // 66 0F 3A + MCE.emitByte(0x66); + Need0FPrefix = true; + break; case X86II::T8XS: // F3 0F 38 case X86II::XS: // F3 0F MCE.emitByte(0xF3); @@ -728,11 +734,13 @@ void Emitter<CodeEmitter>::emitOpcodePrefix(uint64_t TSFlags, MCE.emitByte(0x0F); switch (Desc->TSFlags & X86II::Op0Mask) { + case X86II::T8PD: // 66 0F 38 case X86II::T8XD: // F2 0F 38 case X86II::T8XS: // F3 0F 38 case X86II::T8: // 0F 38 MCE.emitByte(0x38); break; + case X86II::TAPD: // 66 0F 38 case X86II::TAXD: // F2 0F 38 case X86II::TA: // 0F 3A MCE.emitByte(0x3A); @@ -882,6 +890,10 @@ void Emitter<CodeEmitter>::emitVEXOpcodePrefix(uint64_t TSFlags, case X86II::TA: // 0F 3A VEX_5M = 0x3; break; + case X86II::T8PD: // 66 0F 38 + VEX_PP = 0x1; + VEX_5M = 0x2; + break; case X86II::T8XS: // F3 0F 38 VEX_PP = 0x2; VEX_5M = 0x2; @@ -890,10 +902,17 @@ void Emitter<CodeEmitter>::emitVEXOpcodePrefix(uint64_t TSFlags, VEX_PP = 0x3; VEX_5M = 0x2; break; + case X86II::TAPD: // 66 0F 3A + VEX_PP = 0x1; + VEX_5M = 0x3; + break; case X86II::TAXD: // F2 0F 3A VEX_PP = 0x3; VEX_5M = 0x3; break; + case X86II::PD: // 66 0F + VEX_PP = 0x1; + break; case X86II::XS: // F3 0F VEX_PP = 0x2; break; |
