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| author | Tim Northover <tnorthover@apple.com> | 2013-06-01 09:55:14 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2013-06-01 09:55:14 +0000 |
| commit | 3a1fd4c0ac7f5a17d271c895a1597273ac8252c8 (patch) | |
| tree | 0e3993ea8d5465f7be504741c2ef9e178073a885 /llvm/lib/Target/X86/X86CodeEmitter.cpp | |
| parent | 3521dcdcc453c887bf8f170a9742d36c93b18a10 (diff) | |
| download | bcm5719-llvm-3a1fd4c0ac7f5a17d271c895a1597273ac8252c8.tar.gz bcm5719-llvm-3a1fd4c0ac7f5a17d271c895a1597273ac8252c8.zip | |
X86: change MOV64ri64i32 into MOV32ri64
The MOV64ri64i32 instruction required hacky MCInst lowering because it
was allocated as setting a GR64, but the eventual instruction ("movl")
only set a GR32. This converts it into a so-called "MOV32ri64" which
still accepts a (appropriate) 64-bit immediate but defines a GR32.
This is then converted to the full GR64 by a SUBREG_TO_REG operation,
thus keeping everyone happy.
This fixes a typo in the opcode field of the original patch, which
should make the legact JIT work again (& adds test for that problem).
llvm-svn: 183068
Diffstat (limited to 'llvm/lib/Target/X86/X86CodeEmitter.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86CodeEmitter.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86CodeEmitter.cpp b/llvm/lib/Target/X86/X86CodeEmitter.cpp index 8fea6edc8d7..c3734a2ee32 100644 --- a/llvm/lib/Target/X86/X86CodeEmitter.cpp +++ b/llvm/lib/Target/X86/X86CodeEmitter.cpp @@ -1270,7 +1270,7 @@ void Emitter<CodeEmitter>::emitInstruction(MachineInstr &MI, unsigned rt = Is64BitMode ? X86::reloc_pcrel_word : (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word); - if (Opcode == X86::MOV64ri64i32) + if (Opcode == X86::MOV32ri64) rt = X86::reloc_absolute_word; // FIXME: add X86II flag? // This should not occur on Darwin for relocatable objects. if (Opcode == X86::MOV64ri) |
