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| author | Oren Ben Simhon <oren.ben.simhon@intel.com> | 2016-12-11 14:10:52 +0000 |
|---|---|---|
| committer | Oren Ben Simhon <oren.ben.simhon@intel.com> | 2016-12-11 14:10:52 +0000 |
| commit | 9683ecbff6c83ee2181e3bc463bfe1553c7388c6 (patch) | |
| tree | 6d6d4f60e0c84c183aa7182f8829489fa0513ea7 /llvm/lib/Target/X86/X86CallingConv.h | |
| parent | 726774cbf8728315ac1161775db35236764b5f81 (diff) | |
| download | bcm5719-llvm-9683ecbff6c83ee2181e3bc463bfe1553c7388c6.tar.gz bcm5719-llvm-9683ecbff6c83ee2181e3bc463bfe1553c7388c6.zip | |
[X86] Regcall - Adding support for mask types
Regcall calling convention passes mask types arguments in x86 GPR registers.
The review includes the changes required in order to support v32i1, v16i1 and v8i1.
Differential Revision: https://reviews.llvm.org/D27148
llvm-svn: 289383
Diffstat (limited to 'llvm/lib/Target/X86/X86CallingConv.h')
| -rw-r--r-- | llvm/lib/Target/X86/X86CallingConv.h | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/llvm/lib/Target/X86/X86CallingConv.h b/llvm/lib/Target/X86/X86CallingConv.h index 41fbd2e4474..2e93ec9c78c 100644 --- a/llvm/lib/Target/X86/X86CallingConv.h +++ b/llvm/lib/Target/X86/X86CallingConv.h @@ -41,7 +41,6 @@ inline bool CC_X86_32_VectorCallIndirect(unsigned &ValNo, MVT &ValVT, return false; // Continue the search, but now for i32. } - inline bool CC_X86_AnyReg_Error(unsigned &, MVT &, MVT &, CCValAssign::LocInfo &, ISD::ArgFlagsTy &, CCState &) { @@ -51,13 +50,6 @@ inline bool CC_X86_AnyReg_Error(unsigned &, MVT &, MVT &, return false; } -inline bool CC_X86_RegCall_Error(unsigned &, MVT &, MVT &, - CCValAssign::LocInfo &, ISD::ArgFlagsTy &, - CCState &) { - report_fatal_error("LLVM x86 RegCall calling convention implementation" \ - " doesn't support long double and mask types yet."); -} - inline bool CC_X86_32_MCUInReg(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, |
