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authorAmy Huang <akhuang@google.com>2019-10-24 16:37:23 -0700
committerAmy Huang <akhuang@google.com>2019-12-04 11:39:03 -0800
commit9e978bb01ceae8eaa415d8951cc96803e68b73fb (patch)
tree2a77d19fc65de6dee2f87eb5b2c6cb3ed2453459 /llvm/lib/Target/X86/X86.h
parentcdbed2dd856c14687efd741c2d8321686102acb8 (diff)
downloadbcm5719-llvm-9e978bb01ceae8eaa415d8951cc96803e68b73fb.tar.gz
bcm5719-llvm-9e978bb01ceae8eaa415d8951cc96803e68b73fb.zip
Add support for lowering 32-bit/64-bit pointers
Summary: This follows a previous patch that changes the X86 datalayout to represent mixed size pointers (32-bit sext, 32-bit zext, and 64-bit) with address spaces (https://reviews.llvm.org/D64931) This patch implements the address space cast lowering to the corresponding sign extension, zero extension, or truncate instructions. Related to https://bugs.llvm.org/show_bug.cgi?id=42359 Reviewers: rnk, craig.topper, RKSimon Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69639
Diffstat (limited to 'llvm/lib/Target/X86/X86.h')
-rw-r--r--llvm/lib/Target/X86/X86.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86.h b/llvm/lib/Target/X86/X86.h
index 6840fc12751..0481a40d462 100644
--- a/llvm/lib/Target/X86/X86.h
+++ b/llvm/lib/Target/X86/X86.h
@@ -150,6 +150,18 @@ void initializeX86ExpandPseudoPass(PassRegistry &);
void initializeX86FlagsCopyLoweringPassPass(PassRegistry &);
void initializeX86OptimizeLEAPassPass(PassRegistry &);
void initializeX86SpeculativeLoadHardeningPassPass(PassRegistry &);
+
+namespace X86AS {
+enum : unsigned {
+ GS = 256,
+ FS = 257,
+ SS = 258,
+ PTR32_SPTR = 270,
+ PTR32_UPTR = 271,
+ PTR64 = 272
+};
+} // End X86AS namespace
+
} // End llvm namespace
#endif
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