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authorSimon Pilgrim <llvm-dev@redking.me.uk>2019-05-26 16:00:35 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2019-05-26 16:00:35 +0000
commita044410f37e9fbef56370bb4fab64b60e13b4ca2 (patch)
tree28b14b3171dfbe4714745d4c843028f7720f6311 /llvm/lib/Target/X86/Utils/X86ShuffleDecode.cpp
parent7b883b7ed0555527f6c1facc249fc7bd61062d7f (diff)
downloadbcm5719-llvm-a044410f37e9fbef56370bb4fab64b60e13b4ca2.tar.gz
bcm5719-llvm-a044410f37e9fbef56370bb4fab64b60e13b4ca2.zip
[X86][SSE] Add shuffle combining support for ISD::ANY_EXTEND_VECTOR_INREG
Reuses what we already have in place for ISD::ZERO_EXTEND_VECTOR_INREG just with a different sentinel llvm-svn: 361734
Diffstat (limited to 'llvm/lib/Target/X86/Utils/X86ShuffleDecode.cpp')
-rw-r--r--llvm/lib/Target/X86/Utils/X86ShuffleDecode.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/Utils/X86ShuffleDecode.cpp b/llvm/lib/Target/X86/Utils/X86ShuffleDecode.cpp
index 524e7231891..48fd3e0b7ab 100644
--- a/llvm/lib/Target/X86/Utils/X86ShuffleDecode.cpp
+++ b/llvm/lib/Target/X86/Utils/X86ShuffleDecode.cpp
@@ -383,7 +383,8 @@ void DecodeVPERMMask(unsigned NumElts, unsigned Imm,
}
void DecodeZeroExtendMask(unsigned SrcScalarBits, unsigned DstScalarBits,
- unsigned NumDstElts, SmallVectorImpl<int> &Mask) {
+ unsigned NumDstElts, bool IsAnyExtend,
+ SmallVectorImpl<int> &Mask) {
unsigned Scale = DstScalarBits / SrcScalarBits;
assert(SrcScalarBits < DstScalarBits &&
"Expected zero extension mask to increase scalar size");
@@ -391,7 +392,7 @@ void DecodeZeroExtendMask(unsigned SrcScalarBits, unsigned DstScalarBits,
for (unsigned i = 0; i != NumDstElts; i++) {
Mask.push_back(i);
for (unsigned j = 1; j != Scale; j++)
- Mask.push_back(SM_SentinelZero);
+ Mask.push_back(IsAnyExtend ? SM_SentinelUndef : SM_SentinelZero);
}
}
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