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authorCraig Topper <craig.topper@intel.com>2017-12-15 17:22:58 +0000
committerCraig Topper <craig.topper@intel.com>2017-12-15 17:22:58 +0000
commita16395008cbe49da844d2ee020d09bfb1d6e4e88 (patch)
treedc1a32a5a7f2506acff0d75ad87f02b3a559acb9 /llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
parent7670b4b3b1d1dd828522c59bfdd6cf6d7b41eef8 (diff)
downloadbcm5719-llvm-a16395008cbe49da844d2ee020d09bfb1d6e4e88.tar.gz
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[X86] Fix XSAVE64 and similar instructions to not be allowed by the assembler in 32-bit mode.
There was a top level "let Predicates =" in the .td file that was overriding the Requires on each instruction. I've added an assert to the code emitter to catch more cases like this. I'm sure this isn't the only place where the right predicates aren't being applied. This assert already found that we don't block btq/btsq/btrq in 32-bit mode. llvm-svn: 320830
Diffstat (limited to 'llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp')
-rw-r--r--llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index 272c6f23014..a7059c6914d 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -1130,6 +1130,8 @@ bool X86MCCodeEmitter::emitOpcodePrefix(uint64_t TSFlags, unsigned &CurByte,
EmitByte(0x40 | REX, CurByte, OS);
Ret = true;
}
+ } else {
+ assert(!(TSFlags & X86II::REX_W) && "REX.W requires 64bit mode.");
}
// 0x0F escape code must be emitted just before the opcode.
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