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authorCraig Topper <craig.topper@intel.com>2018-04-03 06:37:04 +0000
committerCraig Topper <craig.topper@intel.com>2018-04-03 06:37:04 +0000
commit9b6a65b9ef6959f390fe30385ca8851fa6f18418 (patch)
tree9e2321adcbd3821891fd8287562e3fd49b899f29 /llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
parent7d522b6eee0cac4427ee36f770284ec23ed690b5 (diff)
downloadbcm5719-llvm-9b6a65b9ef6959f390fe30385ca8851fa6f18418.tar.gz
bcm5719-llvm-9b6a65b9ef6959f390fe30385ca8851fa6f18418.zip
[X86] Reduce number of OpPrefix bits in TSFlags to 2. NFCI
TSFlag doesn't need to disambiguate NoPrfx from PS. So shift the encodings so PS is NoPrfx|0x4. llvm-svn: 329049
Diffstat (limited to 'llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp')
-rw-r--r--llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp4
1 files changed, 1 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index 4cf8dd9e782..9e2d6220985 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -700,10 +700,8 @@ void X86MCCodeEmitter::EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte,
// 0b10: F3
// 0b11: F2
//
- uint8_t VEX_PP;
+ uint8_t VEX_PP = 0;
switch (TSFlags & X86II::OpPrefixMask) {
- default: llvm_unreachable("Invalid op prefix!");
- case X86II::PS: VEX_PP = 0x0; break; // none
case X86II::PD: VEX_PP = 0x1; break; // 66
case X86II::XS: VEX_PP = 0x2; break; // F3
case X86II::XD: VEX_PP = 0x3; break; // F2
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