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author | Craig Topper <craig.topper@gmail.com> | 2016-08-27 17:13:43 +0000 |
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committer | Craig Topper <craig.topper@gmail.com> | 2016-08-27 17:13:43 +0000 |
commit | 6943aa306ee5f27ed3bdd95daa863bed99f2a51b (patch) | |
tree | 7ca9cf745a9f63962831b6250cb43d5387672271 /llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | |
parent | 45793a1f7abd1c93199c00d8d0f4a90d4d00599e (diff) | |
download | bcm5719-llvm-6943aa306ee5f27ed3bdd95daa863bed99f2a51b.tar.gz bcm5719-llvm-6943aa306ee5f27ed3bdd95daa863bed99f2a51b.zip |
[X86] Rename predicate function that detects if requires one of the REX.B, REX.X or REX.R bits. It's old name conflicted with a function in X8II namespace that doesnt' quite do the same thing. NFC
llvm-svn: 279924
Diffstat (limited to 'llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp')
-rw-r--r-- | llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 31 |
1 files changed, 16 insertions, 15 deletions
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp index 735694a2ad5..8045e7c6d87 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp +++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp @@ -81,7 +81,8 @@ public: MI.getOperand(OpNum).getReg()); } - bool isX86_64ExtendedReg(const MCInst &MI, unsigned OpNum) const { + // Does this register require a bit to be set in REX prefix. + bool isREXExtendedReg(const MCInst &MI, unsigned OpNum) const { return (getX86RegEncoding(MI, OpNum) >> 3) & 1; } @@ -1025,43 +1026,43 @@ uint8_t X86MCCodeEmitter::DetermineREXPrefix(const MCInst &MI, uint64_t TSFlags, switch (TSFlags & X86II::FormMask) { case X86II::AddRegFrm: - REX |= isX86_64ExtendedReg(MI, CurOp++) << 0; // REX.B + REX |= isREXExtendedReg(MI, CurOp++) << 0; // REX.B break; case X86II::MRMSrcReg: - REX |= isX86_64ExtendedReg(MI, CurOp++) << 2; // REX.R - REX |= isX86_64ExtendedReg(MI, CurOp++) << 0; // REX.B + REX |= isREXExtendedReg(MI, CurOp++) << 2; // REX.R + REX |= isREXExtendedReg(MI, CurOp++) << 0; // REX.B break; case X86II::MRMSrcMem: { - REX |= isX86_64ExtendedReg(MI, CurOp++) << 2; // REX.R - REX |= isX86_64ExtendedReg(MI, MemOperand+X86::AddrBaseReg) << 0; // REX.B - REX |= isX86_64ExtendedReg(MI, MemOperand+X86::AddrIndexReg) << 1; // REX.X + REX |= isREXExtendedReg(MI, CurOp++) << 2; // REX.R + REX |= isREXExtendedReg(MI, MemOperand+X86::AddrBaseReg) << 0; // REX.B + REX |= isREXExtendedReg(MI, MemOperand+X86::AddrIndexReg) << 1; // REX.X CurOp += X86::AddrNumOperands; break; } case X86II::MRMDestReg: - REX |= isX86_64ExtendedReg(MI, CurOp++) << 0; // REX.B - REX |= isX86_64ExtendedReg(MI, CurOp++) << 2; // REX.R + REX |= isREXExtendedReg(MI, CurOp++) << 0; // REX.B + REX |= isREXExtendedReg(MI, CurOp++) << 2; // REX.R break; case X86II::MRMDestMem: - REX |= isX86_64ExtendedReg(MI, MemOperand+X86::AddrBaseReg) << 0; // REX.B - REX |= isX86_64ExtendedReg(MI, MemOperand+X86::AddrIndexReg) << 1; // REX.X + REX |= isREXExtendedReg(MI, MemOperand+X86::AddrBaseReg) << 0; // REX.B + REX |= isREXExtendedReg(MI, MemOperand+X86::AddrIndexReg) << 1; // REX.X CurOp += X86::AddrNumOperands; - REX |= isX86_64ExtendedReg(MI, CurOp++) << 2; // REX.R + REX |= isREXExtendedReg(MI, CurOp++) << 2; // REX.R break; case X86II::MRMXm: case X86II::MRM0m: case X86II::MRM1m: case X86II::MRM2m: case X86II::MRM3m: case X86II::MRM4m: case X86II::MRM5m: case X86II::MRM6m: case X86II::MRM7m: - REX |= isX86_64ExtendedReg(MI, MemOperand+X86::AddrBaseReg) << 0; // REX.B - REX |= isX86_64ExtendedReg(MI, MemOperand+X86::AddrIndexReg) << 1; // REX.X + REX |= isREXExtendedReg(MI, MemOperand+X86::AddrBaseReg) << 0; // REX.B + REX |= isREXExtendedReg(MI, MemOperand+X86::AddrIndexReg) << 1; // REX.X break; case X86II::MRMXr: case X86II::MRM0r: case X86II::MRM1r: case X86II::MRM2r: case X86II::MRM3r: case X86II::MRM4r: case X86II::MRM5r: case X86II::MRM6r: case X86II::MRM7r: - REX |= isX86_64ExtendedReg(MI, CurOp++) << 0; // REX.B + REX |= isREXExtendedReg(MI, CurOp++) << 0; // REX.B break; } if (REX && UsesHighByteReg) |