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| author | Chris Lattner <sabre@nondot.org> | 2004-04-06 01:48:06 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2004-04-06 01:48:06 +0000 |
| commit | 37ba31f740bf992964ed7993a429039575e379fa (patch) | |
| tree | 0295ad9ab12d0cce15b1ca729e7c71f1eb85e212 /llvm/lib/Target/X86/InstSelectSimple.cpp | |
| parent | bfe74f58d908e052ce1ea376c105a41236d46ea6 (diff) | |
| download | bcm5719-llvm-37ba31f740bf992964ed7993a429039575e379fa.tar.gz bcm5719-llvm-37ba31f740bf992964ed7993a429039575e379fa.zip | |
Implement negation of longs efficiently. For this testcase:
long %test(long %X) {
%Y = sub long 0, %X
ret long %Y
}
We used to generate:
test:
sub %ESP, 4
mov DWORD PTR [%ESP], %ESI
mov %ECX, DWORD PTR [%ESP + 8]
mov %ESI, DWORD PTR [%ESP + 12]
mov %EAX, 0
mov %EDX, 0
sub %EAX, %ECX
sbb %EDX, %ESI
mov %ESI, DWORD PTR [%ESP]
add %ESP, 4
ret
Now we generate:
test:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
neg %EAX
adc %EDX, 0
neg %EDX
ret
llvm-svn: 12681
Diffstat (limited to 'llvm/lib/Target/X86/InstSelectSimple.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/InstSelectSimple.cpp | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/InstSelectSimple.cpp b/llvm/lib/Target/X86/InstSelectSimple.cpp index 6144b626a67..d44288678ca 100644 --- a/llvm/lib/Target/X86/InstSelectSimple.cpp +++ b/llvm/lib/Target/X86/InstSelectSimple.cpp @@ -1690,14 +1690,23 @@ void ISel::emitSimpleBinaryOperation(MachineBasicBlock *MBB, unsigned Class = getClassB(Op0->getType()); // sub 0, X -> neg X - if (OperatorClass == 1 && Class != cLong) + if (OperatorClass == 1) if (ConstantInt *CI = dyn_cast<ConstantInt>(Op0)) { if (CI->isNullValue()) { unsigned op1Reg = getReg(Op1, MBB, IP); static unsigned const NEGTab[] = { - X86::NEG8r, X86::NEG16r, X86::NEG32r + X86::NEG8r, X86::NEG16r, X86::NEG32r, 0, X86::NEG32r }; BuildMI(*MBB, IP, NEGTab[Class], 1, DestReg).addReg(op1Reg); + + if (Class == cLong) { + // We just emitted: Dl = neg Sl + // Now emit : T = addc Sh, 0 + // : Dh = neg T + unsigned T = makeAnotherReg(Type::IntTy); + BuildMI(*MBB, IP, X86::ADC32ri, 2, T).addReg(op1Reg+1).addImm(0); + BuildMI(*MBB, IP, X86::NEG32r, 1, DestReg+1).addReg(T); + } return; } } else if (ConstantFP *CFP = dyn_cast<ConstantFP>(Op0)) |

