diff options
author | Manuel Jacob <me@manueljacob.de> | 2014-03-18 16:14:11 +0000 |
---|---|---|
committer | Manuel Jacob <me@manueljacob.de> | 2014-03-18 16:14:11 +0000 |
commit | dcb78dbc82710b8123b3454c9186ee568619deaf (patch) | |
tree | 4efd733bb9ffb63b49f391ba6aed10494e847e2e /llvm/lib/Target/X86/InstPrinter | |
parent | 4d38c82575f7bb15e8f2b2b41a5267bc06898f3f (diff) | |
download | bcm5719-llvm-dcb78dbc82710b8123b3454c9186ee568619deaf.tar.gz bcm5719-llvm-dcb78dbc82710b8123b3454c9186ee568619deaf.zip |
X86: Use enums for memory operand decoding instead of integer literals.
Summary:
X86BaseInfo.h defines an enum for the offset of each operand in a memory operand
sequence. Some code uses it and some does not. This patch replaces (hopefully)
all remaining locations where an integer literal was used instead of this enum.
No functionality change intended.
Reviewers: nadav
CC: llvm-commits, t.p.northover
Differential Revision: http://llvm-reviews.chandlerc.com/D3108
llvm-svn: 204158
Diffstat (limited to 'llvm/lib/Target/X86/InstPrinter')
-rw-r--r-- | llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp | 16 | ||||
-rw-r--r-- | llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp | 16 |
2 files changed, 16 insertions, 16 deletions
diff --git a/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp b/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp index 4be686aa7a7..eea0a760734 100644 --- a/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp +++ b/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp @@ -182,16 +182,16 @@ void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, void X86ATTInstPrinter::printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O) { - const MCOperand &BaseReg = MI->getOperand(Op); - const MCOperand &IndexReg = MI->getOperand(Op+2); - const MCOperand &DispSpec = MI->getOperand(Op+3); - const MCOperand &SegReg = MI->getOperand(Op+4); + const MCOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); + const MCOperand &IndexReg = MI->getOperand(Op+X86::AddrIndexReg); + const MCOperand &DispSpec = MI->getOperand(Op+X86::AddrDisp); + const MCOperand &SegReg = MI->getOperand(Op+X86::AddrSegmentReg); O << markup("<mem:"); // If this has a segment register, print it. if (SegReg.getReg()) { - printOperand(MI, Op+4, O); + printOperand(MI, Op+X86::AddrSegmentReg, O); O << ':'; } @@ -207,12 +207,12 @@ void X86ATTInstPrinter::printMemReference(const MCInst *MI, unsigned Op, if (IndexReg.getReg() || BaseReg.getReg()) { O << '('; if (BaseReg.getReg()) - printOperand(MI, Op, O); + printOperand(MI, Op+X86::AddrBaseReg, O); if (IndexReg.getReg()) { O << ','; - printOperand(MI, Op+2, O); - unsigned ScaleVal = MI->getOperand(Op+1).getImm(); + printOperand(MI, Op+X86::AddrIndexReg, O); + unsigned ScaleVal = MI->getOperand(Op+X86::AddrScaleAmt).getImm(); if (ScaleVal != 1) { O << ',' << markup("<imm:") diff --git a/llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp b/llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp index e6d21fb7525..1c95d372c1a 100644 --- a/llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp +++ b/llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp @@ -162,15 +162,15 @@ void X86IntelInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, void X86IntelInstPrinter::printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O) { - const MCOperand &BaseReg = MI->getOperand(Op); - unsigned ScaleVal = MI->getOperand(Op+1).getImm(); - const MCOperand &IndexReg = MI->getOperand(Op+2); - const MCOperand &DispSpec = MI->getOperand(Op+3); - const MCOperand &SegReg = MI->getOperand(Op+4); + const MCOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); + unsigned ScaleVal = MI->getOperand(Op+X86::AddrScaleAmt).getImm(); + const MCOperand &IndexReg = MI->getOperand(Op+X86::AddrIndexReg); + const MCOperand &DispSpec = MI->getOperand(Op+X86::AddrDisp); + const MCOperand &SegReg = MI->getOperand(Op+X86::AddrSegmentReg); // If this has a segment register, print it. if (SegReg.getReg()) { - printOperand(MI, Op+4, O); + printOperand(MI, Op+X86::AddrSegmentReg, O); O << ':'; } @@ -178,7 +178,7 @@ void X86IntelInstPrinter::printMemReference(const MCInst *MI, unsigned Op, bool NeedPlus = false; if (BaseReg.getReg()) { - printOperand(MI, Op, O); + printOperand(MI, Op+X86::AddrBaseReg, O); NeedPlus = true; } @@ -186,7 +186,7 @@ void X86IntelInstPrinter::printMemReference(const MCInst *MI, unsigned Op, if (NeedPlus) O << " + "; if (ScaleVal != 1) O << ScaleVal << '*'; - printOperand(MI, Op+2, O); + printOperand(MI, Op+X86::AddrIndexReg, O); NeedPlus = true; } |