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authorMaksim Panchenko <maks@fb.com>2018-07-05 23:32:42 +0000
committerMaksim Panchenko <maks@fb.com>2018-07-05 23:32:42 +0000
commit89e4abe7b740d78ee6b926bf5dac7420bb688983 (patch)
treeb29a37a82259ae9e1bb7f23e57ec35fa72fd55e6 /llvm/lib/Target/X86/Disassembler
parent9e412ec8f2996258f9c6b04f96c5b063cb288c7b (diff)
downloadbcm5719-llvm-89e4abe7b740d78ee6b926bf5dac7420bb688983.tar.gz
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[X86][Disassembler] Fix LOCK prefix disassembler support
Summary: If LOCK prefix is not the first prefix in an instruction, LLVM disassembler silently drops the prefix. The fix is to select a proper instruction with a builtin LOCK prefix if one exists. Reviewers: craig.topper Reviewed By: craig.topper Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D49001 llvm-svn: 336400
Diffstat (limited to 'llvm/lib/Target/X86/Disassembler')
-rw-r--r--llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp2
-rw-r--r--llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp3
-rw-r--r--llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h2
3 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
index 80fd080677c..62312777318 100644
--- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
+++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
@@ -247,6 +247,8 @@ MCDisassembler::DecodeStatus X86GenericDisassembler::getInstruction(
// It should not be 'pause' f3 90
InternalInstr.opcode != 0x90)
Flags |= X86::IP_HAS_REPEAT;
+ if (InternalInstr.hasLockPrefix)
+ Flags |= X86::IP_HAS_LOCK;
}
Instr.setFlags(Flags);
}
diff --git a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
index 7badda457f4..1ac304f3be0 100644
--- a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
+++ b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
@@ -298,6 +298,9 @@ static bool isREX(struct InternalInstruction *insn, uint8_t prefix) {
static void setPrefixPresent(struct InternalInstruction *insn, uint8_t prefix) {
uint8_t nextByte;
switch (prefix) {
+ case 0xf0:
+ insn->hasLockPrefix = true;
+ break;
case 0xf2:
case 0xf3:
if (lookAtByte(insn, &nextByte))
diff --git a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
index c7ad7859967..3b8a4f732ee 100644
--- a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
+++ b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
@@ -563,6 +563,8 @@ struct InternalInstruction {
bool hasAdSize;
// Operand-size override
bool hasOpSize;
+ // Lock prefix
+ bool hasLockPrefix;
// The repeat prefix if any
uint8_t repeatPrefix;
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