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author | Craig Topper <craig.topper@intel.com> | 2018-06-23 06:03:48 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2018-06-23 06:03:48 +0000 |
commit | 254552903491a3ede54f1b3f6475324641ef1506 (patch) | |
tree | 8a61d21f9d471d7597006c813efead4e89a96baa /llvm/lib/Target/X86/Disassembler | |
parent | 68d64e3859c55482d156003de6a9622d2c639725 (diff) | |
download | bcm5719-llvm-254552903491a3ede54f1b3f6475324641ef1506.tar.gz bcm5719-llvm-254552903491a3ede54f1b3f6475324641ef1506.zip |
[X86] Teach disassembler to use %eip instead of %rip when 0x67 prefix is used on a rip-relative address.
llvm-svn: 335413
Diffstat (limited to 'llvm/lib/Target/X86/Disassembler')
-rw-r--r-- | llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp index bac9d02d69c..b658963c846 100644 --- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp +++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp @@ -794,7 +794,9 @@ static bool translateRMMemory(MCInst &mcInst, InternalInstruction &insn, tryAddingPcLoadReferenceComment(insn.startLocation + insn.displacementOffset, insn.displacement + pcrel, Dis); - baseReg = MCOperand::createReg(X86::RIP); // Section 2.2.1.6 + // Section 2.2.1.6 + baseReg = MCOperand::createReg(insn.addressSize == 4 ? X86::EIP : + X86::RIP); } else baseReg = MCOperand::createReg(0); |