diff options
| author | Craig Topper <craig.topper@intel.com> | 2018-06-01 00:10:36 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-06-01 00:10:36 +0000 |
| commit | 0179c6d0e5d2eff4b0073514a766bab44ba917fb (patch) | |
| tree | c76a1d04d3edd5fefd0313de3505bfe0aeed5454 /llvm/lib/Target/X86/Disassembler | |
| parent | b9c2e8cc0124e34b16dd7c80ec998bf7ccb39cb4 (diff) | |
| download | bcm5719-llvm-0179c6d0e5d2eff4b0073514a766bab44ba917fb.tar.gz bcm5719-llvm-0179c6d0e5d2eff4b0073514a766bab44ba917fb.zip | |
[X86][Disassembler] Suppress reading of EVEX.V' and EVEX.R' in 32-bit mode.
llvm-svn: 333714
Diffstat (limited to 'llvm/lib/Target/X86/Disassembler')
| -rw-r--r-- | llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp index 650e644c526..e24f7df97ca 100644 --- a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp +++ b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp @@ -1341,7 +1341,7 @@ static int readModRM(struct InternalInstruction* insn) { reg |= rFromREX(insn->rexPrefix) << 3; rm |= bFromREX(insn->rexPrefix) << 3; - if (insn->vectorExtensionType == TYPE_EVEX) { + if (insn->vectorExtensionType == TYPE_EVEX && insn->mode == MODE_64BIT) { reg |= r2FromEVEX2of4(insn->vectorExtensionPrefix[1]) << 4; rm |= xFromEVEX2of4(insn->vectorExtensionPrefix[1]) << 4; } @@ -1759,7 +1759,7 @@ static int readOperands(struct InternalInstruction* insn) { insn->sibIndex = (SIBIndex)4; // If EVEX.v2 is set this is one of the 16-31 registers. - if (insn->vectorExtensionType == TYPE_EVEX && + if (insn->vectorExtensionType == TYPE_EVEX && insn->mode == MODE_64BIT && v2FromEVEX4of4(insn->vectorExtensionPrefix[3])) insn->sibIndex = (SIBIndex)(insn->sibIndex + 16); |
