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authorBenjamin Kramer <benny.kra@googlemail.com>2010-10-23 09:10:44 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2010-10-23 09:10:44 +0000
commitde0a4fbf3b8c6949d6cb0bf0e191736a3c5c2ab7 (patch)
treed3ad99c0bb76d3468096dc666eb97359e5fc2829 /llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
parentaa19ee17c09874a7c8dbc548b94aa1d0d6aeb453 (diff)
downloadbcm5719-llvm-de0a4fbf3b8c6949d6cb0bf0e191736a3c5c2ab7.tar.gz
bcm5719-llvm-de0a4fbf3b8c6949d6cb0bf0e191736a3c5c2ab7.zip
Make the disassembler tables const so they end up in read-only memory.
llvm-svn: 117206
Diffstat (limited to 'llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c')
-rw-r--r--llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
index 0b7d3013012..1fd66853f75 100644
--- a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
+++ b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
@@ -97,7 +97,7 @@ static InstrUID decode(OpcodeType type,
InstructionContext insnContext,
uint8_t opcode,
uint8_t modRM) {
- struct ModRMDecision* dec;
+ const struct ModRMDecision* dec;
switch (type) {
default:
@@ -141,7 +141,7 @@ static InstrUID decode(OpcodeType type,
* decode(); specifierForUID will not check bounds.
* @return - A pointer to the specification for that instruction.
*/
-static struct InstructionSpecifier* specifierForUID(InstrUID uid) {
+static const struct InstructionSpecifier *specifierForUID(InstrUID uid) {
return &INSTRUCTIONS_SYM[uid];
}
@@ -626,9 +626,9 @@ static int getID(struct InternalInstruction* insn) {
* instead of F2 changes a 32 to a 64, we adopt the new encoding.
*/
- struct InstructionSpecifier* spec;
+ const struct InstructionSpecifier *spec;
uint16_t instructionIDWithREXw;
- struct InstructionSpecifier* specWithREXw;
+ const struct InstructionSpecifier *specWithREXw;
spec = specifierForUID(instructionID);
@@ -666,9 +666,9 @@ static int getID(struct InternalInstruction* insn) {
* in the right place we check if there's a 16-bit operation.
*/
- struct InstructionSpecifier* spec;
+ const struct InstructionSpecifier *spec;
uint16_t instructionIDWithOpsize;
- struct InstructionSpecifier* specWithOpsize;
+ const struct InstructionSpecifier *specWithOpsize;
spec = specifierForUID(instructionID);
@@ -1061,7 +1061,7 @@ GENERIC_FIXUP_FUNC(fixupRMValue, insn->eaRegBase, EA_REG)
* invalid for its class.
*/
static int fixupReg(struct InternalInstruction *insn,
- struct OperandSpecifier *op) {
+ const struct OperandSpecifier *op) {
uint8_t valid;
dbgprintf(insn, "fixupReg()");
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