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authorCraig Topper <craig.topper@intel.com>2018-07-01 17:50:29 +0000
committerCraig Topper <craig.topper@intel.com>2018-07-01 17:50:29 +0000
commit4d8ec92fb0ad553a4e4046504ee4592f4463d96a (patch)
tree1a9099c61a4cc353bfe6629fcd16a9e9ee138d0f /llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
parent279a1a39ad64c2aefd77e38dd6215b7ef4b94566 (diff)
downloadbcm5719-llvm-4d8ec92fb0ad553a4e4046504ee4592f4463d96a.tar.gz
bcm5719-llvm-4d8ec92fb0ad553a4e4046504ee4592f4463d96a.zip
[X86][Disassembler] Remove TYPE_BNDR from translateImmediate.
I've check the disassembler tables and this shouldn't be reachable. Which is good since if it was reachable there should have been a 'return' after the addOperand line. llvm-svn: 336066
Diffstat (limited to 'llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp')
-rw-r--r--llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp2
1 files changed, 0 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
index fa40cfe5fbb..80fd080677c 100644
--- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
+++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
@@ -661,8 +661,6 @@ static void translateImmediate(MCInst &mcInst, uint64_t immediate,
case TYPE_ZMM:
mcInst.addOperand(MCOperand::createReg(X86::ZMM0 + (immediate >> 4)));
return;
- case TYPE_BNDR:
- mcInst.addOperand(MCOperand::createReg(X86::BND0 + (immediate >> 4)));
default:
// operand is 64 bits wide. Do nothing.
break;
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