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| author | Thomas Lively <tlively@google.com> | 2019-12-17 13:58:39 -0800 |
|---|---|---|
| committer | Thomas Lively <tlively@google.com> | 2019-12-17 15:05:50 -0800 |
| commit | f1b351e14a912dbb797b731807d81d4c9af4db0e (patch) | |
| tree | 085e7e73d9c9f2b27cd6889a387714f2e7d5c53c /llvm/lib/Target/WebAssembly | |
| parent | f827aff8598873194bccdfaf469f2dde7e5620d1 (diff) | |
| download | bcm5719-llvm-f1b351e14a912dbb797b731807d81d4c9af4db0e.tar.gz bcm5719-llvm-f1b351e14a912dbb797b731807d81d4c9af4db0e.zip | |
[WebAssembly] Implement SIMD {i8x16,i16x8}.avgr_u instructions
Summary:
These instructions were added to the spec proposal in
https://github.com/WebAssembly/simd/pull/126. Their semantics are
equivalent to `(a + b + 1) / 2`. The opcode for the experimental
i32x4.dot_i16x8_s is also bumped due to a collision with the
i8x16.avgr_u opcode.
Reviewers: aheejin
Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71628
Diffstat (limited to 'llvm/lib/Target/WebAssembly')
| -rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td index 4c8dd53702b..1bd1d2964dd 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td @@ -738,12 +738,31 @@ defm MAX_S : SIMDBinaryIntNoI64x2<smax, "max_s", 96>; defm MAX_U : SIMDBinaryIntNoI64x2<umax, "max_u", 97>; } // isCommutable = 1 +// Integer unsigned rounding average: avgr_u +def avgr_u_v16i8 : + PatFrag<(ops node:$lhs, node:$rhs), + (srl + (add (add node:$lhs, node:$rhs), (splat16 (i32 1))), + (v16i8 (splat16 (i32 1))) + )>; +def avgr_u_v8i16 : + PatFrag<(ops node:$lhs, node:$rhs), + (srl + (add (add node:$lhs, node:$rhs), (splat8 (i32 1))), + (v8i16 (splat8 (i32 1))) + )>; + +let isCommutable = 1, Predicates = [HasUnimplementedSIMD128] in { +defm AVGR_U : SIMDBinary<v16i8, "i8x16", avgr_u_v16i8, "avgr_u", 217>; +defm AVGR_U : SIMDBinary<v8i16, "i16x8", avgr_u_v8i16, "avgr_u", 218>; +} + // Widening dot product: i32x4.dot_i16x8_s let isCommutable = 1 in defm DOT : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs), (outs), (ins), [(set V128:$dst, (int_wasm_dot V128:$lhs, V128:$rhs))], "i32x4.dot_i16x8_s\t$dst, $lhs, $rhs", "i32x4.dot_i16x8_s", - 217>; + 219>; //===----------------------------------------------------------------------===// // Floating-point unary arithmetic |

