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authorDan Gohman <dan433584@gmail.com>2015-11-20 03:02:49 +0000
committerDan Gohman <dan433584@gmail.com>2015-11-20 03:02:49 +0000
commitbb7ce8e408e94c407b3766f0cf7e6cbac5aabecf (patch)
treeecef30c4a4fecd659690c7e2c730e35e33423913 /llvm/lib/Target/WebAssembly
parent744b224bb5115f88ef301ccd6e850dff2ef567de (diff)
downloadbcm5719-llvm-bb7ce8e408e94c407b3766f0cf7e6cbac5aabecf.tar.gz
bcm5719-llvm-bb7ce8e408e94c407b3766f0cf7e6cbac5aabecf.zip
[WebAssembly] Rename SWITCH to TABLESWITCH to match the current wording in the spec.
llvm-svn: 253642
Diffstat (limited to 'llvm/lib/Target/WebAssembly')
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyISD.def2
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp6
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td14
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td8
4 files changed, 15 insertions, 15 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISD.def b/llvm/lib/Target/WebAssembly/WebAssemblyISD.def
index 52c37757cdb..3a03fa55b22 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISD.def
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISD.def
@@ -20,6 +20,6 @@ HANDLE_NODETYPE(RETURN)
HANDLE_NODETYPE(ARGUMENT)
HANDLE_NODETYPE(Wrapper)
HANDLE_NODETYPE(BR_IF)
-HANDLE_NODETYPE(SWITCH)
+HANDLE_NODETYPE(TABLESWITCH)
// add memory opcodes starting at ISD::FIRST_TARGET_MEMORY_OPCODE here...
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
index dbfe00e95ed..8b706b7501c 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
@@ -437,8 +437,8 @@ SDValue WebAssemblyTargetLowering::LowerGlobalAddress(SDValue Op,
SDValue WebAssemblyTargetLowering::LowerJumpTable(SDValue Op,
SelectionDAG &DAG) const {
// There's no need for a Wrapper node because we always incorporate a jump
- // table operand into a SWITCH instruction, rather than ever materializing
- // it in a register.
+ // table operand into a TABLESWITCH instruction, rather than ever
+ // materializing it in a register.
const JumpTableSDNode *JT = cast<JumpTableSDNode>(Op);
return DAG.getTargetJumpTable(JT->getIndex(), Op.getValueType(),
JT->getTargetFlags());
@@ -468,7 +468,7 @@ SDValue WebAssemblyTargetLowering::LowerBR_JT(SDValue Op,
for (auto MBB : MBBs)
Ops.push_back(DAG.getBasicBlock(MBB));
- return DAG.getNode(WebAssemblyISD::SWITCH, DL, MVT::Other, Ops);
+ return DAG.getNode(WebAssemblyISD::TABLESWITCH, DL, MVT::Other, Ops);
}
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
index 998afbe51cb..92393d435c2 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
@@ -24,15 +24,15 @@ def BR : I<(outs), (ins bb_op:$dst),
} // isBranch = 1, isTerminator = 1, hasCtrlDep = 1
// TODO: SelectionDAG's lowering insists on using a pointer as the index for
-// jump tables, so in practice we don't ever use SWITCH_I64 in wasm32 mode
+// jump tables, so in practice we don't ever use TABLESWITCH_I64 in wasm32 mode
// currently.
let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in {
-def SWITCH_I32 : I<(outs), (ins I32:$index, variable_ops),
- [(WebAssemblyswitch I32:$index)],
- "switch \t$index">;
-def SWITCH_I64 : I<(outs), (ins I64:$index, variable_ops),
- [(WebAssemblyswitch I64:$index)],
- "switch \t$index">;
+def TABLESWITCH_I32 : I<(outs), (ins I32:$index, variable_ops),
+ [(WebAssemblytableswitch I32:$index)],
+ "tableswitch\t$index">;
+def TABLESWITCH_I64 : I<(outs), (ins I64:$index, variable_ops),
+ [(WebAssemblytableswitch I64:$index)],
+ "tableswitch\t$index">;
} // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1
// Placemarkers to indicate the start of a block or loop scope.
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
index 382f928be74..dae9cffd2f5 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
@@ -30,7 +30,7 @@ def SDT_WebAssemblyCallSeqEnd :
SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>;
def SDT_WebAssemblyCall0 : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
def SDT_WebAssemblyCall1 : SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>;
-def SDT_WebAssemblySwitch : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
+def SDT_WebAssemblyTableswitch : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
def SDT_WebAssemblyArgument : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>;
def SDT_WebAssemblyReturn : SDTypeProfile<0, -1, []>;
def SDT_WebAssemblyWrapper : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>,
@@ -52,9 +52,9 @@ def WebAssemblycall0 : SDNode<"WebAssemblyISD::CALL0",
def WebAssemblycall1 : SDNode<"WebAssemblyISD::CALL1",
SDT_WebAssemblyCall1,
[SDNPHasChain, SDNPVariadic]>;
-def WebAssemblyswitch : SDNode<"WebAssemblyISD::SWITCH",
- SDT_WebAssemblySwitch,
- [SDNPHasChain, SDNPVariadic]>;
+def WebAssemblytableswitch : SDNode<"WebAssemblyISD::TABLESWITCH",
+ SDT_WebAssemblyTableswitch,
+ [SDNPHasChain, SDNPVariadic]>;
def WebAssemblyargument : SDNode<"WebAssemblyISD::ARGUMENT",
SDT_WebAssemblyArgument>;
def WebAssemblyreturn : SDNode<"WebAssemblyISD::RETURN",
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