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| author | Craig Topper <craig.topper@intel.com> | 2018-04-13 23:57:54 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-04-13 23:57:54 +0000 |
| commit | 95f421cfbf6b56a9d2d0208f972a911458fb9bc1 (patch) | |
| tree | d592bc465905359745b055b0bf5bc2a36bdf5a43 /llvm/lib/Target/WebAssembly | |
| parent | 4dda4b9393d46ba6fb111b6e45d48bd43cc5e31c (diff) | |
| download | bcm5719-llvm-95f421cfbf6b56a9d2d0208f972a911458fb9bc1.tar.gz bcm5719-llvm-95f421cfbf6b56a9d2d0208f972a911458fb9bc1.zip | |
[X86] Add the bizarro movsww and movzww mnemonics for the disassembler.
The destination size of the movzx/movsx instruction is controlled by the normal operand size mechanisms. Only the input type is fixed.
This means that a 0x66 prefix on the encoding for zext/sext 16->32 should really produce a 16->16 instruction. Functionally this is equivalent to a GR16->GR16 move since bits 16 and above will be preserved. So nothing is actually extended.
llvm-svn: 330078
Diffstat (limited to 'llvm/lib/Target/WebAssembly')
0 files changed, 0 insertions, 0 deletions

