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authorDominic Chen <d.c.ddcc@gmail.com>2016-08-17 20:11:03 +0000
committerDominic Chen <d.c.ddcc@gmail.com>2016-08-17 20:11:03 +0000
commit4326167a3701ec7f389294b97051e2bcdd384809 (patch)
tree5a63f7e443a301f923fcfb560f86617c764f0bff /llvm/lib/Target/WebAssembly
parenteb3958fafdb439f963bbd3437ba6cf375304131b (diff)
downloadbcm5719-llvm-4326167a3701ec7f389294b97051e2bcdd384809.tar.gz
bcm5719-llvm-4326167a3701ec7f389294b97051e2bcdd384809.zip
[WebAssembly] Handle debug information and virtual registers without crashing
Summary: Currently, enabling debug information when compiling for WebAssembly crashes the backend. This commit fixes these by skipping debug values in backend passes. Reviewers: jfb, aprantl, dschuff, echristo Subscribers: mehdi_amini, yurydelendik, dexonsmith, MatzeB, jfb, dschuff, llvm-commits Differential Revision: https://reviews.llvm.org/D21808 llvm-svn: 278967
Diffstat (limited to 'llvm/lib/Target/WebAssembly')
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp4
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp2
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyStoreResults.cpp2
3 files changed, 5 insertions, 3 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
index aa40098f246..fba1fdab140 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
@@ -255,7 +255,7 @@ static bool HasOneUse(unsigned Reg, MachineInstr *Def,
const VNInfo *DefVNI = LI.getVNInfoAt(
LIS.getInstructionIndex(*Def).getRegSlot());
assert(DefVNI);
- for (auto I : MRI.use_nodbg_operands(Reg)) {
+ for (auto &I : MRI.use_nodbg_operands(Reg)) {
const auto &Result = LI.Query(LIS.getInstructionIndex(*I.getParent()));
if (Result.valueIn() == DefVNI) {
if (!Result.isKill())
@@ -360,7 +360,7 @@ static bool OneUseDominatesOtherUses(unsigned Reg, const MachineOperand &OneUse,
const MachineInstr *OneUseInst = OneUse.getParent();
VNInfo *OneUseVNI = LI.getVNInfoBefore(LIS.getInstructionIndex(*OneUseInst));
- for (const MachineOperand &Use : MRI.use_operands(Reg)) {
+ for (const MachineOperand &Use : MRI.use_nodbg_operands(Reg)) {
if (&Use == &OneUse)
continue;
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp
index 11bda47eac5..1a83793b0d0 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp
@@ -88,6 +88,8 @@ bool WebAssemblyReplacePhysRegs::runOnMachineFunction(MachineFunction &MF) {
if (VReg == WebAssembly::NoRegister)
VReg = MRI.createVirtualRegister(RC);
MO.setReg(VReg);
+ if (MO.getParent()->isDebugValue())
+ MO.setIsDebug();
Changed = true;
}
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyStoreResults.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyStoreResults.cpp
index 1e9a773ae62..eb157ddd700 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyStoreResults.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyStoreResults.cpp
@@ -90,7 +90,7 @@ static bool ReplaceDominatedUses(MachineBasicBlock &MBB, MachineInstr &MI,
SmallVector<SlotIndex, 4> Indices;
- for (auto I = MRI.use_begin(FromReg), E = MRI.use_end(); I != E;) {
+ for (auto I = MRI.use_nodbg_begin(FromReg), E = MRI.use_nodbg_end(); I != E;) {
MachineOperand &O = *I++;
MachineInstr *Where = O.getParent();
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