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author | Dan Gohman <dan433584@gmail.com> | 2016-02-08 21:50:13 +0000 |
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committer | Dan Gohman <dan433584@gmail.com> | 2016-02-08 21:50:13 +0000 |
commit | 06b495826044483ca9cf98dcb2fccd5e41b17eb4 (patch) | |
tree | 31d870d6e238d0e6cfdae42ad1fe5e09c22e5cfc /llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp | |
parent | 4d36bbaf19821135bbf8b23f8b8f446ae97736e1 (diff) | |
download | bcm5719-llvm-06b495826044483ca9cf98dcb2fccd5e41b17eb4.tar.gz bcm5719-llvm-06b495826044483ca9cf98dcb2fccd5e41b17eb4.zip |
[WebAssembly] Update the br_if instructions' operand orders to match the spec.
llvm-svn: 260152
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp')
-rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp index 23a3b4d5704..201c5ab0bc1 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp @@ -66,7 +66,7 @@ bool WebAssemblyLowerBrUnless::runOnMachineFunction(MachineFunction &MF) { if (MI->getOpcode() != WebAssembly::BR_UNLESS) continue; - unsigned Cond = MI->getOperand(0).getReg(); + unsigned Cond = MI->getOperand(1).getReg(); bool Inverted = false; // Attempt to invert the condition in place. @@ -124,8 +124,8 @@ bool WebAssemblyLowerBrUnless::runOnMachineFunction(MachineFunction &MF) { // delete the br_unless. assert(Inverted); BuildMI(MBB, MI, MI->getDebugLoc(), TII.get(WebAssembly::BR_IF)) - .addReg(Cond) - .addOperand(MI->getOperand(1)); + .addOperand(MI->getOperand(0)) + .addReg(Cond); MBB.erase(MI); } } |