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| author | Thomas Lively <tlively@google.com> | 2019-06-26 16:19:59 +0000 |
|---|---|---|
| committer | Thomas Lively <tlively@google.com> | 2019-06-26 16:19:59 +0000 |
| commit | 7663e0cd7dbb2d8c4dd1f445f7818ac4ebc02c99 (patch) | |
| tree | 6ce594b3343b4ab0eade134443d4b11ca368b338 /llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | |
| parent | a1d97a960e622ee21550d92809512cb0870be499 (diff) | |
| download | bcm5719-llvm-7663e0cd7dbb2d8c4dd1f445f7818ac4ebc02c99.tar.gz bcm5719-llvm-7663e0cd7dbb2d8c4dd1f445f7818ac4ebc02c99.zip | |
[WebAssembly] Omit wrap on i64x2.{shl,shr*} ISel when possible
Summary:
Since the WebAssembly SIMD shift instructions take i32 operands, we
truncate the i64 operand to <2 x i64> shifts during ISel. When the i64
operand is sign extended from i32, this CL makes it so the sign
extension is dropped instead of a wrap instruction added.
Reviewers: dschuff, aheejin
Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63615
llvm-svn: 364446
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td')
| -rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td index cae02d20bd3..dd8930f079b 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td @@ -579,10 +579,16 @@ defm SHL : SIMDShiftInt<shl, "shl", 84>; defm SHR_S : SIMDShiftInt<sra, "shr_s", 85>; defm SHR_U : SIMDShiftInt<srl, "shr_u", 86>; -// Truncate i64 shift operands to i32s -foreach shifts = [[shl, SHL_v2i64], [sra, SHR_S_v2i64], [srl, SHR_U_v2i64]] in +// Truncate i64 shift operands to i32s, except if they are already i32s +foreach shifts = [[shl, SHL_v2i64], [sra, SHR_S_v2i64], [srl, SHR_U_v2i64]] in { +def : Pat<(v2i64 (shifts[0] + (v2i64 V128:$vec), + (v2i64 (splat2 (i64 (sext I32:$x)))) + )), + (v2i64 (shifts[1] (v2i64 V128:$vec), (i32 I32:$x)))>; def : Pat<(v2i64 (shifts[0] (v2i64 V128:$vec), (v2i64 (splat2 I64:$x)))), (v2i64 (shifts[1] (v2i64 V128:$vec), (I32_WRAP_I64 I64:$x)))>; +} // 2xi64 shifts with constant shift amounts are custom lowered to avoid wrapping def wasm_shift_t : SDTypeProfile<1, 2, |

