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| author | Michael Zuckerman <Michael.zuckerman@intel.com> | 2017-06-29 10:00:33 +0000 |
|---|---|---|
| committer | Michael Zuckerman <Michael.zuckerman@intel.com> | 2017-06-29 10:00:33 +0000 |
| commit | 4bcb9c334953fc62c0b10385d4d5fd72d594bafa (patch) | |
| tree | 7971f6f9721f5a2571ea4b3550479b9b575cbb49 /llvm/lib/Target/WebAssembly/WebAssemblyInstrFormats.td | |
| parent | 6936506f504c30733b402b738a2280e34a896003 (diff) | |
| download | bcm5719-llvm-4bcb9c334953fc62c0b10385d4d5fd72d594bafa.tar.gz bcm5719-llvm-4bcb9c334953fc62c0b10385d4d5fd72d594bafa.zip | |
[LLVM][X86][Goldmont] Adding new target-cpu: Goldmont
[LLVM SIDE]
Connecting the GoldMont processor to his feature.
Reviewers:
1. igorb
2. zvi
3. delena
4. RKSimon
5. craig.topper
Differential Revision: https://reviews.llvm.org/D34504
llvm-svn: 306658
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyInstrFormats.td')
0 files changed, 0 insertions, 0 deletions
