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authorHeejin Ahn <aheejin@gmail.com>2018-03-08 04:05:37 +0000
committerHeejin Ahn <aheejin@gmail.com>2018-03-08 04:05:37 +0000
commit0de587296ebdc071086d35e888aa850c0c97340d (patch)
treee39ad75abe0761bd6d0d84bf37772f796e6af076 /llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
parent3f8d38fcf28954bbf3df6a37b180c510d3bebc95 (diff)
downloadbcm5719-llvm-0de587296ebdc071086d35e888aa850c0c97340d.tar.gz
bcm5719-llvm-0de587296ebdc071086d35e888aa850c0c97340d.zip
[WebAssembly] Add except_ref as a first-class type
Summary: Add except_ref as a first-class type, according to the [[https://github.com/WebAssembly/exception-handling/blob/master/proposals/Level-1.md | Level 1 exception handling proposal ]]. Reviewers: dschuff Subscribers: jfb, sbc100, llvm-commits Differential Revision: https://reviews.llvm.org/D43706 llvm-svn: 326985
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp')
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp17
1 files changed, 17 insertions, 0 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
index 59bf1ad2d89..f3ee6e70822 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
@@ -127,6 +127,7 @@ private:
case MVT::i64:
case MVT::f32:
case MVT::f64:
+ case MVT::ExceptRef:
return VT;
case MVT::f16:
return MVT::f32;
@@ -681,6 +682,10 @@ bool WebAssemblyFastISel::fastLowerArguments() {
Opc = WebAssembly::ARGUMENT_v4f32;
RC = &WebAssembly::V128RegClass;
break;
+ case MVT::ExceptRef:
+ Opc = WebAssembly::ARGUMENT_EXCEPT_REF;
+ RC = &WebAssembly::EXCEPT_REFRegClass;
+ break;
default:
return false;
}
@@ -770,6 +775,11 @@ bool WebAssemblyFastISel::selectCall(const Instruction *I) {
IsDirect ? WebAssembly::CALL_v4f32 : WebAssembly::PCALL_INDIRECT_v4f32;
ResultReg = createResultReg(&WebAssembly::V128RegClass);
break;
+ case MVT::ExceptRef:
+ Opc = IsDirect ? WebAssembly::CALL_EXCEPT_REF
+ : WebAssembly::PCALL_INDIRECT_EXCEPT_REF;
+ ResultReg = createResultReg(&WebAssembly::EXCEPT_REFRegClass);
+ break;
default:
return false;
}
@@ -868,6 +878,10 @@ bool WebAssemblyFastISel::selectSelect(const Instruction *I) {
Opc = WebAssembly::SELECT_F64;
RC = &WebAssembly::F64RegClass;
break;
+ case MVT::ExceptRef:
+ Opc = WebAssembly::SELECT_EXCEPT_REF;
+ RC = &WebAssembly::EXCEPT_REFRegClass;
+ break;
default:
return false;
}
@@ -1274,6 +1288,9 @@ bool WebAssemblyFastISel::selectRet(const Instruction *I) {
case MVT::v4f32:
Opc = WebAssembly::RETURN_v4f32;
break;
+ case MVT::ExceptRef:
+ Opc = WebAssembly::RETURN_EXCEPT_REF;
+ break;
default: return false;
}
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