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| author | Craig Topper <craig.topper@intel.com> | 2018-03-29 21:03:53 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-03-29 21:03:53 +0000 |
| commit | 3f2dbec652f8406a314b76bbb5e715a03393db76 (patch) | |
| tree | ccd3506d9cbb97bb0077fe71085b06d0def78e6c /llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp | |
| parent | d676ba0f28ee263bc68f6992ca237cdf9395be21 (diff) | |
| download | bcm5719-llvm-3f2dbec652f8406a314b76bbb5e715a03393db76.tar.gz bcm5719-llvm-3f2dbec652f8406a314b76bbb5e715a03393db76.zip | |
[X86] Remove ReadAfterLd from BMI and TBM instructions that don't have a register operand in their memory form
The memory form of these instructions only read an input from memory. They don't have any register operands.
Differential Revision: https://reviews.llvm.org/D44836
llvm-svn: 328828
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp')
0 files changed, 0 insertions, 0 deletions
