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authorEric Christopher <echristo@gmail.com>2015-03-11 22:56:10 +0000
committerEric Christopher <echristo@gmail.com>2015-03-11 22:56:10 +0000
commit5f141b03fa622e6c2992b3c0b855a297f585dc0d (patch)
treed02eb5eb77ca6e0d87ca55236b2689761f0e2c27 /llvm/lib/Target/TargetSubtargetInfo.cpp
parent9deb75d1766f7082dfd3aeae0e2970383c0e624c (diff)
downloadbcm5719-llvm-5f141b03fa622e6c2992b3c0b855a297f585dc0d.tar.gz
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Remove useMachineScheduler and replace it with subtarget options
that control, individually, all of the disparate things it was controlling. At the same time move a FIXME in the Hexagon port to a new subtarget function that will enable a user of the machine scheduler to avoid using the source scheduler for pre-RA-scheduling. The FIXME would have this removed, but involves either testcase changes or adding -pre-RA-sched=source to a few testcases. llvm-svn: 231980
Diffstat (limited to 'llvm/lib/Target/TargetSubtargetInfo.cpp')
-rw-r--r--llvm/lib/Target/TargetSubtargetInfo.cpp20
1 files changed, 4 insertions, 16 deletions
diff --git a/llvm/lib/Target/TargetSubtargetInfo.cpp b/llvm/lib/Target/TargetSubtargetInfo.cpp
index 10597a84bca..b2bb59ea28c 100644
--- a/llvm/lib/Target/TargetSubtargetInfo.cpp
+++ b/llvm/lib/Target/TargetSubtargetInfo.cpp
@@ -23,22 +23,6 @@ TargetSubtargetInfo::TargetSubtargetInfo() {}
TargetSubtargetInfo::~TargetSubtargetInfo() {}
-// Temporary option to compare overall performance change when moving from the
-// SD scheduler to the MachineScheduler pass pipeline. This is convenient for
-// benchmarking during the transition from SD to MI scheduling. Once armv7 makes
-// the switch, it should go away. The normal way to enable/disable the
-// MachineScheduling pass itself is by using -enable-misched. For targets that
-// already use MI sched (via MySubTarget::enableMachineScheduler())
-// -misched-bench=false negates the subtarget hook.
-static cl::opt<bool> BenchMachineSched("misched-bench", cl::Hidden,
- cl::desc("Migrate from the target's default SD scheduler to MI scheduler"));
-
-bool TargetSubtargetInfo::useMachineScheduler() const {
- if (BenchMachineSched.getNumOccurrences())
- return BenchMachineSched;
- return enableMachineScheduler();
-}
-
bool TargetSubtargetInfo::enableAtomicExpand() const {
return true;
}
@@ -47,6 +31,10 @@ bool TargetSubtargetInfo::enableMachineScheduler() const {
return false;
}
+bool TargetSubtargetInfo::enableJoinGlobalCopies() const {
+ return enableMachineScheduler();
+}
+
bool TargetSubtargetInfo::enableRALocalReassignment(
CodeGenOpt::Level OptLevel) const {
return true;
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