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authorRichard Trieu <rtrieu@google.com>2012-05-09 00:30:21 +0000
committerRichard Trieu <rtrieu@google.com>2012-05-09 00:30:21 +0000
commitedf46e6b6e3d96c8b189a3aa03d6e2c84f212fed (patch)
tree4852ef7d82a4a084434797d243c830e5abd1b2f4 /llvm/lib/Target/TargetRegisterInfo.cpp
parentf60f5ee43dd36a56337b096816b050dc07a3a24b (diff)
downloadbcm5719-llvm-edf46e6b6e3d96c8b189a3aa03d6e2c84f212fed.tar.gz
bcm5719-llvm-edf46e6b6e3d96c8b189a3aa03d6e2c84f212fed.zip
Remove unused variable to silence compiler warning.
llvm-svn: 156456
Diffstat (limited to 'llvm/lib/Target/TargetRegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/TargetRegisterInfo.cpp1
1 files changed, 0 insertions, 1 deletions
diff --git a/llvm/lib/Target/TargetRegisterInfo.cpp b/llvm/lib/Target/TargetRegisterInfo.cpp
index 50ba91e5b16..a989cf4a7af 100644
--- a/llvm/lib/Target/TargetRegisterInfo.cpp
+++ b/llvm/lib/Target/TargetRegisterInfo.cpp
@@ -154,7 +154,6 @@ TargetRegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A,
assert(Idx && "Bad sub-register index");
// Find Idx in the list of super-register indices.
- const uint32_t *Mask = 0;
for (SuperRegClassIterator RCI(B, this); RCI.isValid(); ++RCI)
if (RCI.getSubReg() == Idx)
// The bit mask contains all register classes that are projected into B
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