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author | Rafael Espindola <rafael.espindola@gmail.com> | 2010-06-02 12:39:06 +0000 |
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committer | Rafael Espindola <rafael.espindola@gmail.com> | 2010-06-02 12:39:06 +0000 |
commit | c08ecba5970b17267e7e9e2a11fbd98d47570e30 (patch) | |
tree | 6d51ab0aaf709d6c212488c80b29d8cf0bf06811 /llvm/lib/Target/TargetRegisterInfo.cpp | |
parent | 9242162bb1f3eb15e29345b2eefe724d28ad6868 (diff) | |
download | bcm5719-llvm-c08ecba5970b17267e7e9e2a11fbd98d47570e30.tar.gz bcm5719-llvm-c08ecba5970b17267e7e9e2a11fbd98d47570e30.zip |
Remove uses of getCalleeSavedRegClasses from outside the
backends and removes the virtual declaration. With that out of the way
I should be able to cleanup one backend at a time.
llvm-svn: 105321
Diffstat (limited to 'llvm/lib/Target/TargetRegisterInfo.cpp')
-rw-r--r-- | llvm/lib/Target/TargetRegisterInfo.cpp | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/llvm/lib/Target/TargetRegisterInfo.cpp b/llvm/lib/Target/TargetRegisterInfo.cpp index dcc5f610e6d..32299f6c7e0 100644 --- a/llvm/lib/Target/TargetRegisterInfo.cpp +++ b/llvm/lib/Target/TargetRegisterInfo.cpp @@ -60,6 +60,25 @@ TargetRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, EVT VT) const { return BestRC; } +/// getMinimalPhysRegClass - Returns the Register Class of a physical +/// register of the given type. +const TargetRegisterClass * +TargetRegisterInfo::getMinimalPhysRegClass(unsigned reg) const { + assert(isPhysicalRegister(reg) && "reg must be a physical register"); + + // Pick the most sub register class of the right type that contains + // this physreg. + const TargetRegisterClass* BestRC = 0; + for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I){ + const TargetRegisterClass* RC = *I; + if (RC->contains(reg) && (!BestRC || BestRC->hasSubClass(RC))) + BestRC = RC; + } + + assert(BestRC && "Couldn't find the register class"); + return BestRC; +} + /// getAllocatableSetForRC - Toggle the bits that represent allocatable /// registers for the specific register class. static void getAllocatableSetForRC(const MachineFunction &MF, |