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authorEvan Cheng <evan.cheng@apple.com>2008-04-25 17:21:40 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-04-25 17:21:40 +0000
commit715eaa031c12a769899809602f38236b6d4be38c (patch)
tree9dee6d8691859e77433d681f9ee92ac3c6f3416c /llvm/lib/Target/TargetRegisterInfo.cpp
parent4d43d3c72cd43c1e37e0ab4eae9235044012bb81 (diff)
downloadbcm5719-llvm-715eaa031c12a769899809602f38236b6d4be38c.tar.gz
bcm5719-llvm-715eaa031c12a769899809602f38236b6d4be38c.zip
80 col violation.
llvm-svn: 50266
Diffstat (limited to 'llvm/lib/Target/TargetRegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/TargetRegisterInfo.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/TargetRegisterInfo.cpp b/llvm/lib/Target/TargetRegisterInfo.cpp
index 3aa40dc3e01..9c8de12108c 100644
--- a/llvm/lib/Target/TargetRegisterInfo.cpp
+++ b/llvm/lib/Target/TargetRegisterInfo.cpp
@@ -54,7 +54,7 @@ TargetRegisterInfo::getPhysicalRegisterRegClass(unsigned reg,
// Pick the register class of the right type that contains this physreg.
SmallVector<const TargetRegisterClass*, 4> RCs;
- for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I) {
+ for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I){
if ((VT == MVT::Other || (*I)->hasType(VT)) && (*I)->contains(reg))
RCs.push_back(*I);
}
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