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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2015-05-05 19:27:45 +0000
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2015-05-05 19:27:45 +0000
commit80b3af7ab3f8e76507cc4491be1460f1b1d8adb2 (patch)
treeb9f2252bf5fb13308c25e7f05f918dfdae76aa77 /llvm/lib/Target/TargetMachineC.cpp
parentcd808237b24c7d6d0bb7ddf577dba37c31a06a50 (diff)
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[SystemZ] Add CodeGen support for v4f32
The architecture doesn't really have any native v4f32 operations except v4f32->v2f64 and v2f64->v4f32 conversions, with only half of the v4f32 elements being used. Even so, using vector registers for <4 x float> and scalarising individual operations is much better than generating completely scalar code, since there's much less register pressure. It's also more efficient to do v4f32 comparisons by extending to 2 v2f64s, comparing those, then packing the result. This particularly helps with llvmpipe. Based on a patch by Richard Sandiford. llvm-svn: 236523
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