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authorAna Pazos <apazos@codeaurora.org>2018-01-18 18:54:05 +0000
committerAna Pazos <apazos@codeaurora.org>2018-01-18 18:54:05 +0000
commit1b57c7a0f44c0f76b398ffcef6a64bef7ec17d07 (patch)
tree1148271d984df73ed09d57c1982c703924f87810 /llvm/lib/Target/TargetMachineC.cpp
parentd05541f7d6ec3db9210b4cdd3d1f3a5e549ebdf5 (diff)
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[RISCV] Fixed setting predicates for compressed instructions.
Summary: Fixed setting predicates for compressed instructions. Some instructions were being generated with C extension enabled only, without proper checks for the other required extensions like F, D and 32 and 64-bit target checks. Affected instructions: C_FLD, C_FLW, C_LD, C_FSD, C_FSW, C_SD, C_JAL, C_ADDIW, C_SUBW, C_ADDW, C_FLDSP, C_FLWSP, C_LDSP, C_FSDSP, C_FSWSP, C_SDSP Reviewers: asb, shiva0217 Reviewed By: asb Subscribers: rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, llvm-commits Differential Revision: https://reviews.llvm.org/D42132 llvm-svn: 322876
Diffstat (limited to 'llvm/lib/Target/TargetMachineC.cpp')
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