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| author | Igor Breger <igor.breger@intel.com> | 2017-02-20 14:16:29 +0000 |
|---|---|---|
| committer | Igor Breger <igor.breger@intel.com> | 2017-02-20 14:16:29 +0000 |
| commit | fda32d266a076af4512c5f10148933a109c4864d (patch) | |
| tree | 89b15e1ffdfcaa08f94c2bed6781b9d471b95e67 /llvm/lib/Target/TargetLoweringObjectFile.cpp | |
| parent | d9b319e3e3b9aa77741e70480c4ce41094ff3a85 (diff) | |
| download | bcm5719-llvm-fda32d266a076af4512c5f10148933a109c4864d.tar.gz bcm5719-llvm-fda32d266a076af4512c5f10148933a109c4864d.zip | |
[X86] Fix EXTRACT_VECTOR_ELT with variable index from v32i16 and v64i8 vector.
Its more profitable to go through memory (1 cycles throughput)
than using VMOVD + VPERMV/PSHUFB sequence ( 2/3 cycles throughput) to implement EXTRACT_VECTOR_ELT with variable index.
IACA tool was used to get performace estimation (https://software.intel.com/en-us/articles/intel-architecture-code-analyzer)
For example for var_shuffle_v16i8_v16i8_xxxxxxxxxxxxxxxx_i8 test from vector-shuffle-variable-128.ll I get 26 cycles vs 79 cycles.
Removing the VINSERT node, we don't need it any more.
Differential Revision: https://reviews.llvm.org/D29690
llvm-svn: 295660
Diffstat (limited to 'llvm/lib/Target/TargetLoweringObjectFile.cpp')
0 files changed, 0 insertions, 0 deletions
