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authorJonas Paulsson <paulsson@linux.vnet.ibm.com>2015-12-10 09:10:07 +0000
committerJonas Paulsson <paulsson@linux.vnet.ibm.com>2015-12-10 09:10:07 +0000
commite451eeff5c7e070764584aba20ffdd8919b4b4cd (patch)
treecf39e2e65ff55d935c61661e58aa5bcacdbde16e /llvm/lib/Target/SystemZ
parentb72a9c6f02e4b2db591257c4ea67ae00257950bb (diff)
downloadbcm5719-llvm-e451eeff5c7e070764584aba20ffdd8919b4b4cd.tar.gz
bcm5719-llvm-e451eeff5c7e070764584aba20ffdd8919b4b4cd.zip
[PostRA scheduling] Allow a target to do scheduling when it wants post RA.
SystemZ needs to do its scheduling after branch relaxation, which can only happen after block placement, and therefore the standard PostRAScheduler point in the pass sequence is too early. TargetMachine::targetSchedulesPostRAScheduling() is a new method that signals on returning true that target will insert the final scheduling pass on its own. Reviewed by Hal Finkel llvm-svn: 255234
Diffstat (limited to 'llvm/lib/Target/SystemZ')
-rw-r--r--llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp11
-rw-r--r--llvm/lib/Target/SystemZ/SystemZTargetMachine.h3
2 files changed, 14 insertions, 0 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp b/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
index 22beaad2ab7..f305e85f6cf 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
@@ -16,6 +16,7 @@
using namespace llvm;
+extern cl::opt<bool> MISchedPostRA;
extern "C" void LLVMInitializeSystemZTarget() {
// Register the target.
RegisterTargetMachine<SystemZTargetMachine> X(TheSystemZTarget);
@@ -163,6 +164,16 @@ void SystemZPassConfig::addPreEmitPass() {
if (getOptLevel() != CodeGenOpt::None)
addPass(createSystemZElimComparePass(getSystemZTargetMachine()), false);
addPass(createSystemZLongBranchPass(getSystemZTargetMachine()));
+
+ // Do final scheduling after all other optimizations, to get an
+ // optimal input for the decoder (branch relaxation must happen
+ // after block placement).
+ if (getOptLevel() != CodeGenOpt::None) {
+ if (MISchedPostRA)
+ addPass(&PostMachineSchedulerID);
+ else
+ addPass(&PostRASchedulerID);
+ }
}
TargetPassConfig *SystemZTargetMachine::createPassConfig(PassManagerBase &PM) {
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetMachine.h b/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
index 0a81e1f9fdf..1a8f1f7f3aa 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
+++ b/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
@@ -43,6 +43,9 @@ public:
TargetLoweringObjectFile *getObjFileLowering() const override {
return TLOF.get();
}
+
+ bool targetSchedulesPostRAScheduling() const override { return true; };
+
};
} // end namespace llvm
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