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| author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-19 16:24:22 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-19 16:24:22 +0000 |
| commit | c57e586792504cb7582dbfbc77d8ae746a02e285 (patch) | |
| tree | 3ffca119796c15408a23c81a5ba789e01215b4f6 /llvm/lib/Target/SystemZ | |
| parent | 4c2a09d6c4e0ed887e44a73afe49bb63a93a389a (diff) | |
| download | bcm5719-llvm-c57e586792504cb7582dbfbc77d8ae746a02e285.tar.gz bcm5719-llvm-c57e586792504cb7582dbfbc77d8ae746a02e285.zip | |
[SystemZ] Add NGRK, OGRK and XGRK
Like r186683, but for 64 bits.
llvm-svn: 186685
Diffstat (limited to 'llvm/lib/Target/SystemZ')
| -rw-r--r-- | llvm/lib/Target/SystemZ/SystemZInstrFormats.td | 12 | ||||
| -rw-r--r-- | llvm/lib/Target/SystemZ/SystemZInstrInfo.td | 6 |
2 files changed, 15 insertions, 3 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZInstrFormats.td b/llvm/lib/Target/SystemZ/SystemZInstrFormats.td index 24f86bca09f..f0999756281 100644 --- a/llvm/lib/Target/SystemZ/SystemZInstrFormats.td +++ b/llvm/lib/Target/SystemZ/SystemZInstrFormats.td @@ -747,6 +747,18 @@ multiclass BinaryRRAndK<string mnemonic, bits<8> opcode1, bits<16> opcode2, } } +multiclass BinaryRREAndK<string mnemonic, bits<16> opcode1, bits<16> opcode2, + SDPatternOperator operator, RegisterOperand cls1, + RegisterOperand cls2> { + let NumOpsKey = mnemonic in { + let NumOpsValue = "3" in + def K : BinaryRRFK<mnemonic, opcode2, null_frag, cls1, cls2>, + Requires<[FeatureDistinctOps]>; + let NumOpsValue = "2", isConvertibleToThreeAddress = 1 in + def "" : BinaryRRE<mnemonic, opcode1, operator, cls1, cls2>; + } +} + class BinaryRI<string mnemonic, bits<12> opcode, SDPatternOperator operator, RegisterOperand cls, Immediate imm> : InstRI<opcode, (outs cls:$R1), (ins cls:$R1src, imm:$I2), diff --git a/llvm/lib/Target/SystemZ/SystemZInstrInfo.td b/llvm/lib/Target/SystemZ/SystemZInstrInfo.td index 94b8a3efb09..5ae6af23aec 100644 --- a/llvm/lib/Target/SystemZ/SystemZInstrInfo.td +++ b/llvm/lib/Target/SystemZ/SystemZInstrInfo.td @@ -649,7 +649,7 @@ let Defs = [CC] in { // ANDs of a register. let isCommutable = 1 in { defm NR : BinaryRRAndK<"n", 0x14, 0xB9F4, and, GR32, GR32>; - def NGR : BinaryRRE<"ng", 0xB980, and, GR64, GR64>; + defm NGR : BinaryRREAndK<"ng", 0xB980, 0xB9E4, and, GR64, GR64>; } // ANDs of a 16-bit immediate, leaving other bits unaffected. @@ -686,7 +686,7 @@ let Defs = [CC] in { // ORs of a register. let isCommutable = 1 in { defm OR : BinaryRRAndK<"o", 0x16, 0xB9F6, or, GR32, GR32>; - def OGR : BinaryRRE<"og", 0xB981, or, GR64, GR64>; + defm OGR : BinaryRREAndK<"og", 0xB981, 0xB9E6, or, GR64, GR64>; } // ORs of a 16-bit immediate, leaving other bits unaffected. @@ -723,7 +723,7 @@ let Defs = [CC] in { // XORs of a register. let isCommutable = 1 in { defm XR : BinaryRRAndK<"x", 0x17, 0xB9F7, xor, GR32, GR32>; - def XGR : BinaryRRE<"xg", 0xB982, xor, GR64, GR64>; + defm XGR : BinaryRREAndK<"xg", 0xB982, 0xB9E7, xor, GR64, GR64>; } // XORs of a 32-bit immediate, leaving other bits unaffected. |

