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authorRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-10-01 12:11:47 +0000
committerRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-10-01 12:11:47 +0000
commit89e160d9752d431cf415d3706247e08e9ea44f4c (patch)
tree068e3ab75e54fdf972cf784e84500cb0a5959654 /llvm/lib/Target/SystemZ
parent0755c93b0cf4695ac61092509790f0cd6ddb1812 (diff)
downloadbcm5719-llvm-89e160d9752d431cf415d3706247e08e9ea44f4c.tar.gz
bcm5719-llvm-89e160d9752d431cf415d3706247e08e9ea44f4c.zip
[SystemZ] Add sign-extending high-word loads (LBH and LHH)
llvm-svn: 191740
Diffstat (limited to 'llvm/lib/Target/SystemZ')
-rw-r--r--llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp8
-rw-r--r--llvm/lib/Target/SystemZ/SystemZInstrInfo.td16
2 files changed, 22 insertions, 2 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp b/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
index 798fa3349f9..a1c0c36ae54 100644
--- a/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
@@ -806,6 +806,14 @@ SystemZInstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const {
splitMove(MI, SystemZ::STD);
return true;
+ case SystemZ::LBMux:
+ expandRXYPseudo(MI, SystemZ::LB, SystemZ::LBH);
+ return true;
+
+ case SystemZ::LHMux:
+ expandRXYPseudo(MI, SystemZ::LH, SystemZ::LHH);
+ return true;
+
case SystemZ::LMux:
expandRXYPseudo(MI, SystemZ::L, SystemZ::LFH);
return true;
diff --git a/llvm/lib/Target/SystemZ/SystemZInstrInfo.td b/llvm/lib/Target/SystemZ/SystemZInstrInfo.td
index 241cd3336a9..6eeb91bffac 100644
--- a/llvm/lib/Target/SystemZ/SystemZInstrInfo.td
+++ b/llvm/lib/Target/SystemZ/SystemZInstrInfo.td
@@ -408,9 +408,21 @@ let Defs = [CC], CCValues = 0xE, CompareZeroCCMask = 0xE in
def : Pat<(sext_inreg GR64:$src, i32),
(LGFR (EXTRACT_SUBREG GR64:$src, subreg_l32))>;
-// 32-bit extensions from memory.
-def LB : UnaryRXY<"lb", 0xE376, asextloadi8, GR32, 1>;
+// 32-bit extensions from 8-bit memory. LBMux expands to LB or LBH,
+// depending on the choice of register.
+def LBMux : UnaryRXYPseudo<"lb", asextloadi8, GRX32, 1>,
+ Requires<[FeatureHighWord]>;
+def LB : UnaryRXY<"lb", 0xE376, asextloadi8, GR32, 1>;
+def LBH : UnaryRXY<"lbh", 0xE3C0, asextloadi8, GRH32, 1>,
+ Requires<[FeatureHighWord]>;
+
+// 32-bit extensions from 16-bit memory. LHMux expands to LH or LHH,
+// depending on the choice of register.
+def LHMux : UnaryRXYPseudo<"lh", asextloadi16, GRX32, 2>,
+ Requires<[FeatureHighWord]>;
defm LH : UnaryRXPair<"lh", 0x48, 0xE378, asextloadi16, GR32, 2>;
+def LHH : UnaryRXY<"lhh", 0xE3C4, asextloadi16, GRH32, 2>,
+ Requires<[FeatureHighWord]>;
def LHRL : UnaryRILPC<"lhrl", 0xC45, aligned_asextloadi16, GR32>;
// 64-bit extensions from memory.
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