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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-03-14 00:36:23 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-03-14 00:36:23 +0000 |
| commit | 41e5ac4fa4a90f0d233f16d11763af68b735b8d7 (patch) | |
| tree | 0913b5ae2f8e22b8f104addbcdc1a8aa4520c6ed /llvm/lib/Target/SystemZ | |
| parent | e2d3ce2339682dd20f30ba14dd2cadbbedc827a4 (diff) | |
| download | bcm5719-llvm-41e5ac4fa4a90f0d233f16d11763af68b735b8d7.tar.gz bcm5719-llvm-41e5ac4fa4a90f0d233f16d11763af68b735b8d7.zip | |
TargetMachine: Add address space to getPointerSize
llvm-svn: 327467
Diffstat (limited to 'llvm/lib/Target/SystemZ')
| -rw-r--r-- | llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp index c6bb86f93f1..7dac303b3b3 100644 --- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp +++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp @@ -76,7 +76,7 @@ static MachineOperand earlyUseOperand(MachineOperand Op) { SystemZTargetLowering::SystemZTargetLowering(const TargetMachine &TM, const SystemZSubtarget &STI) : TargetLowering(TM), Subtarget(STI) { - MVT PtrVT = MVT::getIntegerVT(8 * TM.getPointerSize()); + MVT PtrVT = MVT::getIntegerVT(8 * TM.getPointerSize(0)); // Set up the register classes. if (Subtarget.hasHighWord()) |
